[Mlir-commits] [mlir] [mlir][emitc] Arith to EmitC: Handle addi, subi and muli (PR #86120)

Matthias Gehre llvmlistbot at llvm.org
Thu Mar 21 08:06:40 PDT 2024


mgehre-amd wrote:

> > No handling yet for divsi and divui, as they require special considerations for signedness.
> 
> Probably we already need some special considerations for this case. E.g. for `arith.addi` the docs [mlir.llvm.org/docs/Dialects/ArithOps/#arithaddi-arithaddiop](https://mlir.llvm.org/docs/Dialects/ArithOps/#arithaddi-arithaddiop) state
> 
> > Performs N-bit addition on the operands. The operands are interpreted as unsigned bitvectors. The result is represented by a bitvector containing the mathematical value of the addition modulo 2^n, where n is the bitwidth.
> 
> Following [en.cppreference.com/w/cpp/language/operator_arithmetic#Overflows](https://en.cppreference.com/w/cpp/language/operator_arithmetic#Overflows)
> 
> > Unsigned integer arithmetic is always performed modulo 2n where n is the number of bits in that particular integer.
> 
> we should probably cast to unsigned, perform the arithmetic operation and add another cast. WDYT?

Good point, this will otherwise cause UB for when the C types are signed.

https://github.com/llvm/llvm-project/pull/86120


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