[Mlir-commits] [mlir] [mlir][sparse] Fix typos in comments (PR #86074)
Matthias Springer
llvmlistbot at llvm.org
Wed Mar 20 20:30:47 PDT 2024
https://github.com/matthias-springer created https://github.com/llvm/llvm-project/pull/86074
None
>From 72b97fc5b08a4272212e5d16b15ddf19ee85d46d Mon Sep 17 00:00:00 2001
From: Matthias Springer <springerm at google.com>
Date: Thu, 21 Mar 2024 03:29:45 +0000
Subject: [PATCH] [mlir][sparse] Fix typos in comments
---
.../test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir | 3 +--
.../Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir | 3 +--
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
index 34d450c2403f61..7ecccad212cdbe 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack.mlir
@@ -285,8 +285,7 @@ module {
%has_runtime = sparse_tensor.has_runtime_library
scf.if %has_runtime {
// sparse_tensor.assemble copies buffers when running with the runtime
- // library. Deallocations are needed not needed when running in codgen
- // mode.
+ // library. Deallocations are not needed when running in codegen mode.
bufferization.dealloc_tensor %s4 : tensor<10x10xf64, #SortedCOO>
bufferization.dealloc_tensor %s5 : tensor<10x10xf64, #SortedCOOI32>
bufferization.dealloc_tensor %csr : tensor<2x2xf64, #CSR>
diff --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
index fe8836266a4793..20ae7e86285cce 100755
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
@@ -146,8 +146,7 @@ module {
%has_runtime = sparse_tensor.has_runtime_library
scf.if %has_runtime {
// sparse_tensor.assemble copies buffers when running with the runtime
- // library. Deallocations are needed not needed when running in codgen
- // mode.
+ // library. Deallocations are not needed when running in codegen mode.
bufferization.dealloc_tensor %s0 : tensor<4x3x2xf32, #CCC>
bufferization.dealloc_tensor %s1 : tensor<4x3x2xf32, #BatchedCSR>
bufferization.dealloc_tensor %s2 : tensor<4x3x2xf32, #CSRDense>
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