[Mlir-commits] [mlir] 9a3ece2 - [mlir][sparse] Fix the calling convention of __truncsfbf2 on windows x64

Benjamin Kramer llvmlistbot at llvm.org
Tue Mar 19 05:49:59 PDT 2024


Author: Benjamin Kramer
Date: 2024-03-19T13:48:10+01:00
New Revision: 9a3ece232ced907f87ed0d5846a57f6d9cbc9832

URL: https://github.com/llvm/llvm-project/commit/9a3ece232ced907f87ed0d5846a57f6d9cbc9832
DIFF: https://github.com/llvm/llvm-project/commit/9a3ece232ced907f87ed0d5846a57f6d9cbc9832.diff

LOG: [mlir][sparse] Fix the calling convention of __truncsfbf2 on windows x64

It also wants us to return the value in XMM0.

Added: 
    

Modified: 
    mlir/lib/ExecutionEngine/Float16bits.cpp

Removed: 
    


################################################################################
diff  --git a/mlir/lib/ExecutionEngine/Float16bits.cpp b/mlir/lib/ExecutionEngine/Float16bits.cpp
index 841610e3c161dc..e5b4f18dd644b8 100644
--- a/mlir/lib/ExecutionEngine/Float16bits.cpp
+++ b/mlir/lib/ExecutionEngine/Float16bits.cpp
@@ -165,7 +165,7 @@ bool operator==(const bf16 &f1, const bf16 &f2) { return f1.bits == f2.bits; }
 #endif
 #endif
 
-#if defined(__x86_64__)
+#if defined(__x86_64__) || defined(_M_X64)
 // On x86 bfloat16 is passed in SSE registers. Since both float and __bf16
 // are passed in the same register we can use the wider type and careful casting
 // to conform to x86_64 psABI. This only works with the assumption that we're


        


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