[Mlir-commits] [mlir] Add Vector bitwidth target to Linearize Vectorizable and Constant Ops (PR #83314)
Han-Chung Wang
llvmlistbot at llvm.org
Fri Mar 1 10:08:52 PST 2024
================
@@ -1,17 +1,25 @@
// RUN: mlir-opt %s -split-input-file -test-vector-linearize | FileCheck %s
+// RUN: mlir-opt %s -split-input-file -test-vector-linearize=target-vector-bitwidth=128 | FileCheck %s
+// RUN: mlir-opt %s -split-input-file -test-vector-linearize=target-vector-bitwidth=12 | FileCheck %s --check-prefix=CHECK12
----------------
hanhanW wrote:
It looks like you wanna test all ops are not linearized? I'm saying that because all the element types has bitwidth greater than 12. If so, maybe just test with `bitwidth=0` and make check prefix more specific.
https://github.com/llvm/llvm-project/pull/83314
More information about the Mlir-commits
mailing list