[Mlir-commits] [mlir] [mlir] [sroa] Update name of subelement types in destructurable slots (PR #97226)
Théo Degioanni
llvmlistbot at llvm.org
Sun Jun 30 10:58:27 PDT 2024
https://github.com/Moxinilian created https://github.com/llvm/llvm-project/pull/97226
The `elementPtrs` has changed meaning over time and the name is now outdated which may be confusing. This PR updates it to a name representative of current usage.
>From 420ceace19538ac276af4736ed40896a99a16f80 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Th=C3=A9o=20Degioanni?=
<theo.degioanni.llvm.deluge062 at simplelogin.fr>
Date: Sun, 30 Jun 2024 19:57:28 +0200
Subject: [PATCH] [mlir] [sroa] Update name of subelement types in
destructurable slots
---
mlir/include/mlir/Interfaces/MemorySlotInterfaces.h | 2 +-
mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp | 10 +++++-----
mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp | 2 +-
mlir/lib/Transforms/SROA.cpp | 4 ++--
mlir/test/lib/Dialect/Test/TestOpDefs.cpp | 2 +-
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/mlir/include/mlir/Interfaces/MemorySlotInterfaces.h b/mlir/include/mlir/Interfaces/MemorySlotInterfaces.h
index aaa261be6553f..7bebfc9a30064 100644
--- a/mlir/include/mlir/Interfaces/MemorySlotInterfaces.h
+++ b/mlir/include/mlir/Interfaces/MemorySlotInterfaces.h
@@ -27,7 +27,7 @@ struct MemorySlot {
/// Memory slot attached with information about its destructuring procedure.
struct DestructurableMemorySlot : public MemorySlot {
/// Maps an index within the memory slot to the corresponding subelement type.
- DenseMap<Attribute, Type> elementPtrs;
+ DenseMap<Attribute, Type> subelementTypes;
};
/// Returned by operation promotion logic requesting the deletion of an
diff --git a/mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp b/mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
index 3f1e5b1773bf7..5dc506c14ef96 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
@@ -841,12 +841,12 @@ bool LLVM::GEPOp::canRewire(const DestructurableMemorySlot &slot,
return false;
auto indexAttr =
IntegerAttr::get(IntegerType::get(getContext(), 32), accessInfo->index);
- assert(slot.elementPtrs.contains(indexAttr));
+ assert(slot.subelementTypes.contains(indexAttr));
usedIndices.insert(indexAttr);
// The remainder of the subslot should be accesses in-bounds. Thus, we create
// a dummy slot with the size of the remainder.
- Type subslotType = slot.elementPtrs.lookup(indexAttr);
+ Type subslotType = slot.subelementTypes.lookup(indexAttr);
uint64_t slotSize = dataLayout.getTypeSize(subslotType);
LLVM::LLVMArrayType remainingSlotType =
getByteArrayType(getContext(), slotSize - accessInfo->subslotOffset);
@@ -923,7 +923,7 @@ static bool definitelyWritesOnlyWithinSlot(MemIntr op, const MemorySlot &slot,
/// into them.
static bool areAllIndicesI32(const DestructurableMemorySlot &slot) {
Type i32 = IntegerType::get(slot.ptr.getContext(), 32);
- return llvm::all_of(llvm::make_first_range(slot.elementPtrs),
+ return llvm::all_of(llvm::make_first_range(slot.subelementTypes),
[&](Attribute index) {
auto intIndex = dyn_cast<IntegerAttr>(index);
return intIndex && intIndex.getType() == i32;
@@ -1159,7 +1159,7 @@ static bool memcpyCanRewire(MemcpyLike op, const DestructurableMemorySlot &slot,
return false;
if (op.getSrc() == slot.ptr)
- for (Attribute index : llvm::make_first_range(slot.elementPtrs))
+ for (Attribute index : llvm::make_first_range(slot.subelementTypes))
usedIndices.insert(index);
return true;
@@ -1211,7 +1211,7 @@ memcpyRewire(MemcpyLike op, const DestructurableMemorySlot &slot,
// It was previously checked that index types are consistent, so this type can
// be fetched now.
Type indexType = cast<IntegerAttr>(subslots.begin()->first).getType();
- for (size_t i = 0, e = slot.elementPtrs.size(); i != e; i++) {
+ for (size_t i = 0, e = slot.subelementTypes.size(); i != e; i++) {
Attribute index = IntegerAttr::get(indexType, i);
if (!subslots.contains(index))
continue;
diff --git a/mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp b/mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
index 631dee2d40538..847c2f350f2bb 100644
--- a/mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
+++ b/mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
@@ -277,7 +277,7 @@ bool memref::StoreOp::canRewire(const DestructurableMemorySlot &slot,
return false;
Attribute index = getAttributeIndexFromIndexOperands(
getContext(), getIndices(), getMemRefType());
- if (!index || !slot.elementPtrs.contains(index))
+ if (!index || !slot.subelementTypes.contains(index))
return false;
usedIndices.insert(index);
return true;
diff --git a/mlir/lib/Transforms/SROA.cpp b/mlir/lib/Transforms/SROA.cpp
index 39f7256fb789d..1c0efa06518dd 100644
--- a/mlir/lib/Transforms/SROA.cpp
+++ b/mlir/lib/Transforms/SROA.cpp
@@ -146,11 +146,11 @@ static void destructureSlot(
allocator.destructure(slot, info.usedIndices, builder, newAllocators);
if (statistics.slotsWithMemoryBenefit &&
- slot.elementPtrs.size() != info.usedIndices.size())
+ slot.subelementTypes.size() != info.usedIndices.size())
(*statistics.slotsWithMemoryBenefit)++;
if (statistics.maxSubelementAmount)
- statistics.maxSubelementAmount->updateMax(slot.elementPtrs.size());
+ statistics.maxSubelementAmount->updateMax(slot.subelementTypes.size());
SetVector<Operation *> usersToRewire;
for (Operation *user : llvm::make_first_range(info.userToBlockingUses))
diff --git a/mlir/test/lib/Dialect/Test/TestOpDefs.cpp b/mlir/test/lib/Dialect/Test/TestOpDefs.cpp
index 9b36748b54dbd..b86f6922f5ea3 100644
--- a/mlir/test/lib/Dialect/Test/TestOpDefs.cpp
+++ b/mlir/test/lib/Dialect/Test/TestOpDefs.cpp
@@ -1321,7 +1321,7 @@ DenseMap<Attribute, MemorySlot> TestMultiSlotAlloca::destructure(
DenseMap<Attribute, MemorySlot> slotMap;
for (Attribute usedIndex : usedIndices) {
- Type elemType = slot.elementPtrs.lookup(usedIndex);
+ Type elemType = slot.subelementTypes.lookup(usedIndex);
MemRefType elemPtr = MemRefType::get({}, elemType);
auto subAlloca = builder.create<TestMultiSlotAlloca>(getLoc(), elemPtr);
newAllocators.push_back(subAlloca);
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