[Mlir-commits] [mlir] [mlir][ArmSVE] Add `arm_sve.psel` operation (PR #95764)
Andrzej WarzyĆski
llvmlistbot at llvm.org
Mon Jun 17 09:41:06 PDT 2024
================
@@ -64,3 +64,11 @@ func.func @arm_sve_zip_x4_bad_vector_type(%a : vector<[5]xf64>) {
arm_sve.zip.x4 %a, %a, %a, %a : vector<[5]xf64>
return
}
+
+// -----
+
+func.func @arm_sve_psel_bad_vector_type(%a : vector<[7]xi1>, %index: index) {
+ // expected-error at +1 {{op operand #0 must be of ranks 1scalable vector of 1-bit signless integer values of length 16/8/4/2/1, but got 'vector<[7]xi1>'}}
----------------
banach-space wrote:
`1scalable`?
https://github.com/llvm/llvm-project/pull/95764
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