[Mlir-commits] [mlir] [mlir][ArmSVE] Add `arm_sve.psel` operation (PR #95764)
Andrzej WarzyĆski
llvmlistbot at llvm.org
Mon Jun 17 09:41:06 PDT 2024
================
@@ -442,6 +442,43 @@ def ZipX4Op : ArmSVE_Op<"zip.x4", [
}];
}
+def PselOp : ArmSVE_Op<"psel", [
+ Pure,
+ AllTypesMatch<["p1", "result"]>,
+]> {
+ let summary = "Predicate select";
+
+ let description = [{
+ This operation returns the input predicate `p1` or an all-false predicate
+ based on the bit at `p2[index]`. Informally the semantics are:
+ ```
+ if p2[index % num_elements(p2)] == 1:
+ return p1 : type(p1)
+ return all-false : type(p1)
+ ```
+
+ Example:
+ ```mlir
+ // Note: p1 and p2 can have different sizes.
+ %pd = arm_sve.psel %p1, %p2[%index] : vector<[4]xi1>, vector<[8]xi1>
+ ```
+
+ Note: This requires SME or SVE2.1 (`+sme` or `+sve2p1` in LLVM target features).
----------------
banach-space wrote:
```suggestion
Note: This requires SME or SVE2.1 (`+sme` or `+sve2p1` in LLVM target features when lowering to assembly and/or machine code).
```
?
https://github.com/llvm/llvm-project/pull/95764
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