[Mlir-commits] [mlir] [MLIR][Vector] Implement TransferOpReduceRank as MaskableOpRewritePattern (PR #92426)
Hugo Trachino
llvmlistbot at llvm.org
Thu Jun 13 02:13:12 PDT 2024
================
@@ -187,3 +187,49 @@ module attributes {transform.with_named_sequence} {
transform.yield
}
}
+
+// -----
+
+
+// CHECK: #[[MAP:.*]] = affine_map<(d0, d1, d2, d3) -> (d1, 0, d3)>
+// CHECK: func.func @transfer_read_reduce_rank_scalable(
+// CHECK-SAME: %[[ARG_0:.*]]: memref<?x?x?x?xf32>) -> vector<8x[4]x2x3xf32> {
+// CHECK: %[[C0:.*]] = arith.constant 0 : index
+// CHECK: %[[TFR:.*]] = vector.transfer_read %arg0[%[[C0]], %[[C0]], %[[C0]], %[[C0]]]{{.*}} permutation_map = #[[MAP]]} : memref<?x?x?x?xf32>, vector<[4]x2x3xf32>
+// CHECK: %[[BC:.*]] = vector.broadcast %[[TFR]] : vector<[4]x2x3xf32> to vector<8x[4]x2x3xf32>
+// CHECK: return %[[BC]] : vector<8x[4]x2x3xf32>
+func.func @transfer_read_reduce_rank_scalable(%mem: memref<?x?x?x?xf32>) -> vector<8x[4]x2x3xf32> {
----------------
nujaa wrote:
There is a transposition in the permutation map of `permutation_with_mask_xfer_read_scalable`. It would hence also trigger `TransferReadPermutationLowering` which IIRC would fail without https://github.com/llvm/llvm-project/pull/91987 . Changes were not completely independent, this one is a bit more _unit_ test-like
https://github.com/llvm/llvm-project/pull/92426
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