[Mlir-commits] [mlir] [mlir][vector] Support n-D vectors in i8 to i4 trunci emulation (PR #94946)

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git-clang-format --diff 3fefb3c598db995433093ed158c08368809b3f78 2cc061d037ddd09fff599bf8739486d1a3676205 -- mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
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View the diff from clang-format here.
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diff --git a/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp b/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
index d00588de19..2788067baa 100644
--- a/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
@@ -912,8 +912,8 @@ static Value rewriteI4ToI8UnsignedExt(PatternRewriter &rewriter, Location loc,
   return rewriter.create<vector::InterleaveOp>(loc, low, high);
 }
 
-/// Rewrite the i8 -> i4 truncation into a deinterleave and series of bitwise ops
-/// that take advantage of high-level information to avoid leaving LLVM to
+/// Rewrite the i8 -> i4 truncation into a deinterleave and series of bitwise
+/// ops that take advantage of high-level information to avoid leaving LLVM to
 /// scramble with peephole optimizations.
 static Value rewriteI8ToI4Trunc(PatternRewriter &rewriter, Location loc,
                                 Value srcValue) {
@@ -928,8 +928,7 @@ static Value rewriteI8ToI4Trunc(PatternRewriter &rewriter, Location loc,
   constexpr int8_t i8LowBitMask = 0x0F;
   VectorType deinterI8VecType = deinterleaveOp.getResultVectorType();
   Value zeroOutMask = rewriter.create<arith::ConstantOp>(
-      loc, DenseElementsAttr::get(deinterI8VecType,
-                                  i8LowBitMask));
+      loc, DenseElementsAttr::get(deinterI8VecType, i8LowBitMask));
   Value zeroOutLow = rewriter.create<arith::AndIOp>(
       loc, deinterleaveOp.getRes1(), zeroOutMask);
 

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https://github.com/llvm/llvm-project/pull/94946