[Mlir-commits] [mlir] 197c3a3 - Use llvm::less_first (NFC) (#94136)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Sun Jun 2 07:45:55 PDT 2024
Author: Kazu Hirata
Date: 2024-06-02T07:45:50-07:00
New Revision: 197c3a3efc703711ac8f14bc4f1765eaadb8e5bc
URL: https://github.com/llvm/llvm-project/commit/197c3a3efc703711ac8f14bc4f1765eaadb8e5bc
DIFF: https://github.com/llvm/llvm-project/commit/197c3a3efc703711ac8f14bc4f1765eaadb8e5bc.diff
LOG: Use llvm::less_first (NFC) (#94136)
Added:
Modified:
clang/lib/Serialization/ASTWriter.cpp
clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
llvm/lib/MC/MCPseudoProbe.cpp
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
Removed:
################################################################################
diff --git a/clang/lib/Serialization/ASTWriter.cpp b/clang/lib/Serialization/ASTWriter.cpp
index e830c4026ea78..eb41a205bc82c 100644
--- a/clang/lib/Serialization/ASTWriter.cpp
+++ b/clang/lib/Serialization/ASTWriter.cpp
@@ -3205,9 +3205,7 @@ void ASTWriter::WritePragmaDiagnosticMappings(const DiagnosticsEngine &Diag,
}
// Sort by diag::kind for deterministic output.
- llvm::sort(Mappings, [](const auto &LHS, const auto &RHS) {
- return LHS.first < RHS.first;
- });
+ llvm::sort(Mappings, llvm::less_first());
for (const auto &I : Mappings) {
Record.push_back(I.first);
diff --git a/clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp b/clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
index 0c047b6c5da2f..0f82f22d8b9a8 100644
--- a/clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
+++ b/clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
@@ -259,9 +259,7 @@ static void canonicalizeDefines(PreprocessorOptions &PPOpts) {
++Index;
}
- llvm::stable_sort(SimpleNames, [](const MacroOpt &A, const MacroOpt &B) {
- return A.first < B.first;
- });
+ llvm::stable_sort(SimpleNames, llvm::less_first());
// Keep the last instance of each macro name by going in reverse
auto NewEnd = std::unique(
SimpleNames.rbegin(), SimpleNames.rend(),
diff --git a/llvm/lib/MC/MCPseudoProbe.cpp b/llvm/lib/MC/MCPseudoProbe.cpp
index cec50322bb9f9..040f3aab88128 100644
--- a/llvm/lib/MC/MCPseudoProbe.cpp
+++ b/llvm/lib/MC/MCPseudoProbe.cpp
@@ -182,13 +182,10 @@ void MCPseudoProbeInlineTree::emit(MCObjectStreamer *MCOS,
// Emit sorted descendant. InlineSite is unique for each pair, so there will
// be no ordering of Inlinee based on MCPseudoProbeInlineTree*
using InlineeType = std::pair<InlineSite, MCPseudoProbeInlineTree *>;
- auto Comparer = [](const InlineeType &A, const InlineeType &B) {
- return A.first < B.first;
- };
std::vector<InlineeType> Inlinees;
for (const auto &Child : Children)
Inlinees.emplace_back(Child.first, Child.second.get());
- std::sort(Inlinees.begin(), Inlinees.end(), Comparer);
+ llvm::sort(Inlinees, llvm::less_first());
for (const auto &Inlinee : Inlinees) {
// Emit probe index
@@ -230,13 +227,10 @@ void MCPseudoProbeSections::emit(MCObjectStreamer *MCOS) {
// Emit sorted descendant. InlineSite is unique for each pair, so there
// will be no ordering of Inlinee based on MCPseudoProbeInlineTree*
using InlineeType = std::pair<InlineSite, MCPseudoProbeInlineTree *>;
- auto Comparer = [](const InlineeType &A, const InlineeType &B) {
- return A.first < B.first;
- };
std::vector<InlineeType> Inlinees;
for (const auto &Child : Root.getChildren())
Inlinees.emplace_back(Child.first, Child.second.get());
- std::sort(Inlinees.begin(), Inlinees.end(), Comparer);
+ llvm::sort(Inlinees, llvm::less_first());
for (const auto &Inlinee : Inlinees) {
// Emit the group guarded by a sentinel probe.
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
index 8c014832f5e46..9fe02e24c8a15 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
@@ -597,10 +597,7 @@ class SIMachineFunctionInfo final : public AMDGPUMachineFunction,
const ReservedRegSet &getWWMReservedRegs() const { return WWMReservedRegs; }
ArrayRef<PrologEpilogSGPRSpill> getPrologEpilogSGPRSpills() const {
- assert(
- is_sorted(PrologEpilogSGPRSpills, [](const auto &LHS, const auto &RHS) {
- return LHS.first < RHS.first;
- }));
+ assert(is_sorted(PrologEpilogSGPRSpills, llvm::less_first()));
return PrologEpilogSGPRSpills;
}
diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
index 36ecf692b02c5..ce7f6b2865375 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
@@ -557,9 +557,7 @@ struct GenericOpScheduler : public OpRewritePattern<linalg::GenericOp> {
unsigned lvl = llvm::cast<AffineDimExpr>(expr).getPosition();
lvlSeq.push_back(std::make_pair(lvl, lvlSeq.size()));
}
- std::sort(lvlSeq.begin(), lvlSeq.end(), [](auto &lhs, auto &rhs) -> bool {
- return lhs.first < rhs.first;
- });
+ llvm::sort(lvlSeq, llvm::less_first());
SmallVector<unsigned> perm =
llvm::to_vector(llvm::make_second_range(lvlSeq));
auto dimToLvl = AffineMap::getPermutationMap(perm, linalgOp.getContext());
diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
index 98e315865ba5d..05883f1cefdf3 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
@@ -184,8 +184,7 @@ void LoopEmitter::initialize(ValueRange ts, StringAttr loopTag, bool hasOutput,
for (Level l = 0; l < lvlRank; l++) {
std::vector<std::pair<LoopId, unsigned>> deps = dimGetter(tid, l);
// Sort the loop by order.
- std::sort(deps.begin(), deps.end(),
- [](auto &lhs, auto &rhs) { return lhs.first < rhs.first; });
+ llvm::sort(deps, llvm::less_first());
dependentLvlMap[tid][l] = std::move(deps);
unsigned depends = dependentLvlMap[tid][l].size();
More information about the Mlir-commits
mailing list