[Mlir-commits] [mlir] [mlir][ArmSME] Add rewrite to handle unsupported SVE transposes via SME/ZA (PR #98620)
Cullen Rhodes
llvmlistbot at llvm.org
Mon Jul 22 04:48:49 PDT 2024
================
@@ -374,6 +376,14 @@ struct LegalizeTransferWriteOpsByDecomposition
}
};
+auto makeVscaleConstantBuilder(PatternRewriter &rewriter, Location loc) {
+ Value vscale = rewriter.create<vector::VectorScaleOp>(loc);
+ return [loc, vscale, &rewriter](int64_t multiplier) {
+ return rewriter.create<arith::MulIOp>(
+ loc, vscale, rewriter.create<arith::ConstantIndexOp>(loc, multiplier));
+ };
+}
----------------
c-rhodes wrote:
this pattern is used often, move to utils?
https://github.com/llvm/llvm-project/pull/98620
More information about the Mlir-commits
mailing list