[Mlir-commits] [mlir] [MLIR][AMDGPU] Add amdgpu.sched_barrier (PR #98911)

[Manupa Karunaratne]

================
@@ -433,6 +433,46 @@ def AMDGPU_LDSBarrierOp : AMDGPU_Op<"lds_barrier"> {
   let assemblyFormat = "attr-dict";
 }
 
+def AMDGPU_SchedBarrierOpOpt : I32BitEnumAttr<"sched_barrier_opt_enum",
+    "The possible options for scheduling barriers",
+    [
+      I32BitEnumAttrCaseBit<"allow_none", 0>,
----------------
manupak wrote:

I32BitEnumAttrCaseNone is the right choice here. thanks! fixed now.

https://github.com/llvm/llvm-project/pull/98911