[Mlir-commits] [mlir] [mlir][tablegen] make enum parser optional (PR #98508)

[Maksim Levental]

https://github.com/makslevental updated https://github.com/llvm/llvm-project/pull/98508

>From aa77b1f05ee57c2c89bd6cee21f2dc2fb0f4ba1e Mon Sep 17 00:00:00 2001
From: makslevental <maksim.levental at gmail.com>
Date: Thu, 11 Jul 2024 12:20:37 -0500
Subject: [PATCH] [mlir][tablegen] make enum parser optional

---
 mlir/include/mlir/TableGen/Attribute.h | 1 +
 mlir/lib/TableGen/Attribute.cpp        | 2 ++
 mlir/test/mlir-tblgen/enums-gen.td     | 7 +++++++
 mlir/tools/mlir-tblgen/EnumsGen.cpp    | 3 ++-
 4 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/mlir/include/mlir/TableGen/Attribute.h b/mlir/include/mlir/TableGen/Attribute.h
index d0a9430d4ed6c..04ab61b042ce4 100644
--- a/mlir/include/mlir/TableGen/Attribute.h
+++ b/mlir/include/mlir/TableGen/Attribute.h
@@ -204,6 +204,7 @@ class EnumAttr : public Attribute {
   std::vector<EnumAttrCase> getAllCases() const;
 
   bool genSpecializedAttr() const;
+  bool genParser() const;
   llvm::Record *getBaseAttrClass() const;
   StringRef getSpecializedAttrClassName() const;
   bool printBitEnumPrimaryGroups() const;
diff --git a/mlir/lib/TableGen/Attribute.cpp b/mlir/lib/TableGen/Attribute.cpp
index 57c77c74106b9..6da69266e91df 100644
--- a/mlir/lib/TableGen/Attribute.cpp
+++ b/mlir/lib/TableGen/Attribute.cpp
@@ -229,6 +229,8 @@ bool EnumAttr::genSpecializedAttr() const {
   return def->getValueAsBit("genSpecializedAttr");
 }
 
+bool EnumAttr::genParser() const { return def->getValueAsBit("genParser"); }
+
 llvm::Record *EnumAttr::getBaseAttrClass() const {
   return def->getValueAsDef("baseAttrClass");
 }
diff --git a/mlir/test/mlir-tblgen/enums-gen.td b/mlir/test/mlir-tblgen/enums-gen.td
index c3a768e42236c..cf072e19d0fc2 100644
--- a/mlir/test/mlir-tblgen/enums-gen.td
+++ b/mlir/test/mlir-tblgen/enums-gen.td
@@ -101,3 +101,10 @@ def MyNonKeywordBitEnum: I32BitEnumAttr<"MyNonKeywordBitEnum", "An example bit e
 // DECL: inline ::llvm::raw_ostream &operator<<(::llvm::raw_ostream &p, ::MyNonKeywordBitEnum value) {
 // DECL:   auto valueStr = stringifyEnum(value);
 // DECL:   return p << '"' << valueStr << '"';
+
+def NoParserEnum: I32BitEnumAttr<"NoParserEnum", "An example enum with no parser emitted",
+                           [None, Bit0, Bit1, Bit2, Bit3, BitGroup]> {
+  let genParser = 0;
+}
+
+// DECL-NOT: struct FieldParser<::NoParserEnum, ::NoParserEnum>
diff --git a/mlir/tools/mlir-tblgen/EnumsGen.cpp b/mlir/tools/mlir-tblgen/EnumsGen.cpp
index f1d7a233b66a9..029d5814d0ac1 100644
--- a/mlir/tools/mlir-tblgen/EnumsGen.cpp
+++ b/mlir/tools/mlir-tblgen/EnumsGen.cpp
@@ -636,7 +636,8 @@ class {1} : public ::mlir::{2} {
   // Generate a generic parser and printer for the enum.
   std::string qualName =
       std::string(formatv("{0}::{1}", cppNamespace, enumName));
-  emitParserPrinter(enumAttr, qualName, cppNamespace, os);
+  if (enumAttr.genParser())
+    emitParserPrinter(enumAttr, qualName, cppNamespace, os);
 
   // Emit DenseMapInfo for this enum class
   emitDenseMapInfo(qualName, underlyingType, cppNamespace, os);