[Mlir-commits] [flang] [mlir] [Flang][OpenMP] Add lowering support for DO SIMD (PR #97718)

LLVM Continuous Integration llvmlistbot at llvm.org
Tue Jul 9 03:52:23 PDT 2024


llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `clang-aarch64-sve-vla` running on `linaro-g3-01` while building `flang,mlir` at step 7 "ninja check 1".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/17/builds/588

Here is the relevant piece of the build log for the reference:
```
Step 7 (ninja check 1) failure: stage 1 checked (failure)
******************** TEST 'Flang :: Lower/OpenMP/wsloop-simd.f90' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 3: bbc -fopenmp -emit-hlfir /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Lower/OpenMP/wsloop-simd.f90 -o - | /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/stage1/bin/FileCheck /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Lower/OpenMP/wsloop-simd.f90
+ /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/stage1/bin/FileCheck /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Lower/OpenMP/wsloop-simd.f90
+ bbc -fopenmp -emit-hlfir /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Lower/OpenMP/wsloop-simd.f90 -o -
/home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Lower/OpenMP/wsloop-simd.f90:15:16: error: CHECK-SAME: expected string not found in input
 ! CHECK-SAME: aligned({{.*}})
               ^
<stdin>:109:10: note: scanning from here
 omp.simd {
         ^
<stdin>:121:25: note: possible intended match here
 func.func @_QPdo_simd_safelen() {
                        ^

Input file: <stdin>
Check file: /home/tcwg-buildbot/worker/clang-aarch64-sve-vla/llvm/flang/test/Lower/OpenMP/wsloop-simd.f90

-dump-input=help explains the following input dump.

Input was:
<<<<<<
           .
           .
           .
         104:  %93:2 = hlfir.declare %92 {uniq_name = "_QFdo_simd_alignedEindex_"} : (!fir.ref<i32>) -> (!fir.ref<i32>, !fir.ref<i32>) 
         105:  %c1_i32 = arith.constant 1 : i32 
         106:  %c10_i32 = arith.constant 10 : i32 
         107:  %c1_i32_7 = arith.constant 1 : i32 
         108:  omp.wsloop { 
         109:  omp.simd { 
same:15'0              X~~ error: no match found
         110:  omp.loop_nest (%arg1) : i32 = (%c1_i32) to (%c10_i32) inclusive step (%c1_i32_7) { 
same:15'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
         111:  fir.store %arg1 to %93#1 : !fir.ref<i32> 
same:15'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
         112:  fir.call @_QPc_test_call(%1#1) fastmath<contract> : (!fir.ref<!fir.type<_QM__fortran_builtinsT__builtin_c_ptr{__address:i64}>>) -> () 
same:15'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
         113:  omp.yield 
same:15'0     ~~~~~~~~~~~
         114:  } 
same:15'0     ~~~
         115:  omp.terminator 
same:15'0     ~~~~~~~~~~~~~~~~
         116:  } 
same:15'0     ~~~
         117:  omp.terminator 
...

```

https://github.com/llvm/llvm-project/pull/97718


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