[Mlir-commits] [mlir] [mlir] [arith] add shl overflow flag in Arith and lower to SPIR-V and LLVMIR (PR #79828)

[Yi Wu]

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@@ -791,11 +791,17 @@ def Arith_ShLIOp : Arith_TotalIntBinaryOp<"shli"> {
     operand is greater than the bitwidth of the first operand, then the 
     operation returns poison.
 
+    This op supports `nuw`/`nsw` overflow flags which stands stand for
+    "No Unsigned Wrap" and "No Signed Wrap", respectively. If the `nuw` and/or
+    `nsw` flags are present, and an unsigned/signed overflow occurs
+    (respectively), the result is poison.
+
     Example:
 
     ```mlir
     %1 = arith.constant 5 : i8                 // %1 is 0b00000101
     %2 = arith.constant 3 : i8
+    %a = arith.shli %1, %2 overflow<nsw, nuw> : i8  
     %3 = arith.shli %1, %2 : (i8, i8) -> i8    // %3 is 0b00101000
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yi-wu-arm wrote:

Thanks for the review! Done.

https://github.com/llvm/llvm-project/pull/79828