[Mlir-commits] [mlir] [mlir] [arith] add shl overflow flag in Arith and lower to SPIR-V and LLVMIR (PR #79828)
Yi Wu
llvmlistbot at llvm.org
Mon Jan 29 07:59:05 PST 2024
https://github.com/yi-wu-arm updated https://github.com/llvm/llvm-project/pull/79828
>From 3312e5236fc6119e49653d4b6b183a2662da8bfe Mon Sep 17 00:00:00 2001
From: Yi Wu <yi.wu2 at arm.com>
Date: Fri, 19 Jan 2024 16:24:59 +0000
Subject: [PATCH 1/3] add shli overflow flag
---
mlir/include/mlir/Dialect/Arith/IR/ArithOps.td | 3 ++-
mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir | 2 ++
mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir | 4 ++++
mlir/test/Dialect/Arith/ops.mlir | 2 ++
4 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td b/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
index cd0102f91ef1523..cb99ae90806c2bb 100644
--- a/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
+++ b/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
@@ -782,7 +782,7 @@ def Arith_XOrIOp : Arith_TotalIntBinaryOp<"xori", [Commutative]> {
// ShLIOp
//===----------------------------------------------------------------------===//
-def Arith_ShLIOp : Arith_TotalIntBinaryOp<"shli"> {
+def Arith_ShLIOp : Arith_IntBinaryOpWithOverflowFlags<"shli"> {
let summary = "integer left-shift";
let description = [{
The `shli` operation shifts the integer value of the first operand to the left
@@ -796,6 +796,7 @@ def Arith_ShLIOp : Arith_TotalIntBinaryOp<"shli"> {
```mlir
%1 = arith.constant 5 : i8 // %1 is 0b00000101
%2 = arith.constant 3 : i8
+ %a = arith.shli %1, %2 overflow<nsw, nuw> : (i8, i8) -> i8
%3 = arith.shli %1, %2 : (i8, i8) -> i8 // %3 is 0b00101000
```
}];
diff --git a/mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir b/mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
index 8937b24e0d174d1..29268eef47e8534 100644
--- a/mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
+++ b/mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
@@ -586,5 +586,7 @@ func.func @ops_supporting_overflow(%arg0: i64, %arg1: i64) {
%1 = arith.subi %arg0, %arg1 overflow<nuw> : i64
// CHECK: %{{.*}} = llvm.mul %{{.*}}, %{{.*}} overflow<nsw, nuw> : i64
%2 = arith.muli %arg0, %arg1 overflow<nsw, nuw> : i64
+ // CHECK: %{{.*}} = llvm.shl %{{.*}}, %{{.*}} overflow<nsw, nuw> : i64
+ %3 = arith.shli %arg0, %arg1 overflow<nsw, nuw> : i64
return
}
diff --git a/mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir b/mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
index 8bf90ed0aec8ee1..ae47ae36ca51cd6 100644
--- a/mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
+++ b/mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
@@ -1422,6 +1422,8 @@ func.func @ops_flags(%arg0: i64, %arg1: i64) {
%1 = arith.subi %arg0, %arg1 overflow<nuw> : i64
// CHECK: %{{.*}} = spirv.IMul %{{.*}}, %{{.*}} {no_signed_wrap, no_unsigned_wrap} : i64
%2 = arith.muli %arg0, %arg1 overflow<nsw, nuw> : i64
+ // CHECK: %{{.*}} = spirv.ShiftLeftLogical %{{.*}}, %{{.*}} {no_signed_wrap, no_unsigned_wrap} : i64
+ %3 = arith.shli %arg0, %arg1 overflow<nsw, nuw> : i64
return
}
@@ -1443,6 +1445,8 @@ func.func @ops_flags(%arg0: i64, %arg1: i64) {
%1 = arith.subi %arg0, %arg1 overflow<nuw> : i64
// CHECK: %{{.*}} = spirv.IMul %{{.*}}, %{{.*}} : i64
%2 = arith.muli %arg0, %arg1 overflow<nsw, nuw> : i64
+ // CHECK: %{{.*}} = spirv.IMul %{{.*}}, %{{.*}} : i64
+ %3 = arith.muli %arg0, %arg1 overflow<nsw, nuw> : i64
return
}
diff --git a/mlir/test/Dialect/Arith/ops.mlir b/mlir/test/Dialect/Arith/ops.mlir
index 8ae3273f32c6b02..e499573e324b5fc 100644
--- a/mlir/test/Dialect/Arith/ops.mlir
+++ b/mlir/test/Dialect/Arith/ops.mlir
@@ -1147,5 +1147,7 @@ func.func @intflags_func(%arg0: i64, %arg1: i64) {
%1 = arith.subi %arg0, %arg1 overflow<nuw> : i64
// CHECK: %{{.*}} = arith.muli %{{.*}}, %{{.*}} overflow<nsw, nuw> : i64
%2 = arith.muli %arg0, %arg1 overflow<nsw, nuw> : i64
+ // CHECK: %{{.*}} = arith.shli %{{.*}}, %{{.*}} overflow<nsw, nuw> : i64
+ %3 = arith.shli %arg0, %arg1 overflow<nsw, nuw> : i64
return
}
>From 8bec786878a0d2027e1e92f1d744589f5c32eae3 Mon Sep 17 00:00:00 2001
From: Yi Wu <yi.wu2 at arm.com>
Date: Mon, 29 Jan 2024 13:49:44 +0000
Subject: [PATCH 2/3] [mlir] [arith] add shl overflow flag in Arith and lower
to SPIR-V and LLVMIR
---
mlir/include/mlir/Dialect/Arith/IR/ArithOps.td | 5 +++++
mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp | 4 +++-
mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp | 2 +-
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td b/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
index cb99ae90806c2bb..4b815a2208f6c3d 100644
--- a/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
+++ b/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
@@ -791,6 +791,11 @@ def Arith_ShLIOp : Arith_IntBinaryOpWithOverflowFlags<"shli"> {
operand is greater than the bitwidth of the first operand, then the
operation returns poison.
+ This op supports `nuw`/`nsw` overflow flags which stands stand for
+ "No Unsigned Wrap" and "No Signed Wrap", respectively. If the `nuw` and/or
+ `nsw` flags are present, and an unsigned/signed overflow occurs
+ (respectively), the result is poison.
+
Example:
```mlir
diff --git a/mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp b/mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
index cf46e0d3ac46ac3..1f01f4a75c5b3ef 100644
--- a/mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
+++ b/mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
@@ -96,7 +96,9 @@ using RemUIOpLowering =
VectorConvertToLLVMPattern<arith::RemUIOp, LLVM::URemOp>;
using SelectOpLowering =
VectorConvertToLLVMPattern<arith::SelectOp, LLVM::SelectOp>;
-using ShLIOpLowering = VectorConvertToLLVMPattern<arith::ShLIOp, LLVM::ShlOp>;
+using ShLIOpLowering =
+ VectorConvertToLLVMPattern<arith::ShLIOp, LLVM::ShlOp,
+ arith::AttrConvertOverflowToLLVM>;
using ShRSIOpLowering =
VectorConvertToLLVMPattern<arith::ShRSIOp, LLVM::AShrOp>;
using ShRUIOpLowering =
diff --git a/mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp b/mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
index 1abad1e9fa4d85c..edf81bd7a8f3963 100644
--- a/mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
+++ b/mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
@@ -1217,7 +1217,7 @@ void mlir::arith::populateArithToSPIRVPatterns(
BitwiseOpPattern<arith::AndIOp, spirv::LogicalAndOp, spirv::BitwiseAndOp>,
BitwiseOpPattern<arith::OrIOp, spirv::LogicalOrOp, spirv::BitwiseOrOp>,
XOrIOpLogicalPattern, XOrIOpBooleanPattern,
- spirv::ElementwiseOpPattern<arith::ShLIOp, spirv::ShiftLeftLogicalOp>,
+ ElementwiseArithOpPattern<arith::ShLIOp, spirv::ShiftLeftLogicalOp>,
spirv::ElementwiseOpPattern<arith::ShRUIOp, spirv::ShiftRightLogicalOp>,
spirv::ElementwiseOpPattern<arith::ShRSIOp, spirv::ShiftRightArithmeticOp>,
spirv::ElementwiseOpPattern<arith::NegFOp, spirv::FNegateOp>,
>From 43b6aeb37f02861ae5492ea41064d8d14e8e68cc Mon Sep 17 00:00:00 2001
From: Yi Wu <43659785+yi-wu-arm at users.noreply.github.com>
Date: Mon, 29 Jan 2024 15:58:57 +0000
Subject: [PATCH 3/3] Update mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>
---
mlir/include/mlir/Dialect/Arith/IR/ArithOps.td | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td b/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
index 4b815a2208f6c3d..50aff25220fdef9 100644
--- a/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
+++ b/mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
@@ -801,7 +801,7 @@ def Arith_ShLIOp : Arith_IntBinaryOpWithOverflowFlags<"shli"> {
```mlir
%1 = arith.constant 5 : i8 // %1 is 0b00000101
%2 = arith.constant 3 : i8
- %a = arith.shli %1, %2 overflow<nsw, nuw> : (i8, i8) -> i8
+ %a = arith.shli %1, %2 overflow<nsw, nuw> : i8
%3 = arith.shli %1, %2 : (i8, i8) -> i8 // %3 is 0b00101000
```
}];
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