[Mlir-commits] [mlir] [mlir][ArmSME] Add initial SME vector legalization pass (PR #79152)

Andrzej WarzyƄski llvmlistbot at llvm.org
Wed Jan 24 11:35:00 PST 2024


================
@@ -122,4 +122,23 @@ def TileAllocation
   let dependentDialects = ["func::FuncDialect"];
 }
 
+def VectorLegalization
+  : Pass<"arm-sme-vector-legalization", "mlir::ModuleOp"> {
+  let summary = "Legalize vectors for ArmSME";
+  let description = [{
+    This pass legalizes vector operations so that they can be lowered to ArmSME.
+    This includes decomposing operations that operate on vector types larger
+    than a single SME tile (e.g. `vector<[8]x[8]xf32>`) into multiple SME
----------------
banach-space wrote:

`vector<[8]x[8]xf32>` matches the size of `ZA`, right? How about vectors that are larger than this? Or smaller?

https://github.com/llvm/llvm-project/pull/79152


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