[Mlir-commits] [mlir] Fix TOSA FP16->INT16 CAST lowering (PR #79299)
Jakub Kuderski
llvmlistbot at llvm.org
Wed Jan 24 11:24:24 PST 2024
================
@@ -480,23 +480,53 @@ createLinalgBodyCalculationForElementwiseOp(Operation *op, ValueRange args,
}
if (arith::FPToSIOp::areCastCompatible(srcTy, dstTy)) {
- auto intMin = rewriter.create<arith::ConstantOp>(
+ auto intMinFP = rewriter.create<arith::ConstantOp>(
loc, rewriter.getFloatAttr(
getElementTypeOrSelf(srcTy),
APInt::getSignedMinValue(dstTy.getIntOrFloatBitWidth())
.getSExtValue()));
- auto intMax = rewriter.create<arith::ConstantOp>(
+ auto rounded = rewriter.create<math::RoundEvenOp>(loc, args[0]);
+
+ // The input floating-point type has enough mantissa bits to represent
+ // the max int value so just clamp the input in the floating-point
+ // domain and convert to int. Note: the min value can be represented
+ // because it consists of a mantissa with only the lsb set.
+ if (cast<FloatType>(srcTy).getFPMantissaWidth() >=
+ dstTy.getIntOrFloatBitWidth() - 1) {
----------------
kuhar wrote:
Can you expand on the INT_MIN case? I'd think that the minimum 16-bit int would be -2^15 and if the FP format has a dedicated sign bit (and in turn +0 and -0), the mantissa needs to have 16 bits as well to represent 2^15 (i.e., sign bit set, msb mantissa bit set).
I haven't thought about this too much so maybe I'm missing something, but shouldn't the condition be?
```
if (MantissaWidth() >= IntBitWidth())
```
https://github.com/llvm/llvm-project/pull/79299
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