[Mlir-commits] [mlir] [mlir][ArmSVE] add zip1 intrinsic (PR #79270)
Andrzej WarzyĆski
llvmlistbot at llvm.org
Wed Jan 24 08:29:43 PST 2024
banach-space wrote:
> I've been successfully using `vector.shuffle` to model this pattern for Neon and the zip instructions were generated accordingly so I'm wondering if we could do the same for scalable. What is the way to model scalable shuffles in LLVM?
IIUC, that's not possible for SVE. From https://llvm.org/docs/LangRef.html#id189:
> For scalable vectors, the only valid mask values at present are zeroinitializer, undef and poison, since we cannot write all indices as literals for a vector with a length unknown at compile time.
https://github.com/llvm/llvm-project/pull/79270
More information about the Mlir-commits
mailing list