[Mlir-commits] [mlir] [mlir][ArmSVE] add zip1 intrinsic (PR #79270)

Benjamin Maxwell llvmlistbot at llvm.org
Wed Jan 24 05:00:49 PST 2024


MacDue wrote:

Maybe add zip2 as well? 
(In the 2/4-way lowerings I think `zip1, zip2`, would use half the registers two `zip1`s, which might be something we'd like to try). 

https://github.com/llvm/llvm-project/pull/79270


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