[Mlir-commits] [libcxxabi] [compiler-rt] [openmp] [libc] [mlir] [clang-tools-extra] [clang] [libcxx] [llvm] [flang] [AArch64] Combine store (trunc X to <3 x i8>) to sequence of ST1.b. (PR #78637)

[Florian Hahn]

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@@ -21471,6 +21471,57 @@ bool isHalvingTruncateOfLegalScalableType(EVT SrcVT, EVT DstVT) {
          (SrcVT == MVT::nxv2i64 && DstVT == MVT::nxv2i32);
 }
 
+// Combine store (trunc X to <3 x i8>) to sequence of ST1.b.
+static SDValue combineI8TruncStore(StoreSDNode *ST, SelectionDAG &DAG,
+                                   const AArch64Subtarget *Subtarget) {
+  SDValue Value = ST->getValue();
+  EVT ValueVT = Value.getValueType();
+
+  if (ST->isVolatile() || !Subtarget->isLittleEndian() ||
+      ST->getOriginalAlign() >= 4 || Value.getOpcode() != ISD::TRUNCATE ||
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fhahn wrote:

Yes, this was only relevant for the load case I think. I will remove it (and also add tests with different alignments)

https://github.com/llvm/llvm-project/pull/78637