[Mlir-commits] [mlir] [mlir][ArmSME] Support widening outer products (PR #78975)

Benjamin Maxwell llvmlistbot at llvm.org
Tue Jan 23 10:00:30 PST 2024


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@@ -410,4 +410,8 @@ def ConvertToSvboolIntrOp :
     /*overloadedResults=*/[]>,
     Arguments<(ins SVEPredicate:$mask)>;
 
+def Zip1IntrOp :
+  ArmSVE_IntrBinaryOverloadedOp<"zip1">,
+  Arguments<(ins AnyScalableVector, AnyScalableVector)>;
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MacDue wrote:

In the ArmSME dialect there's an `SVEVector` constraint for this, maybe that should be moved somewhere shared? 

https://github.com/llvm/llvm-project/pull/78975


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