[Mlir-commits] [mlir] [mlir][vector] Fix invalid IR in `RewriteBitCastOfTruncI` (PR #78146)

[Nicolas Vasilache]

https://github.com/nicolasvasilache approved this pull request.

@joker-eph ah thanks for digging deeper, I was under the impression we were disabling `16xi3 -> 3xi16` type bitcasts.

Seems we are just removing hoops then, which seems fine.

I can live with this, although it would seem that this would be better as a folder in LLVM when certain ops are noops ..

https://github.com/llvm/llvm-project/pull/78146