[Mlir-commits] [mlir] [MLIR][Affine] Add test pass for affine isContiguousAccess (PR #82923)

[Uday Bondhugula]

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@@ -344,10 +333,12 @@ bool mlir::affine::isVectorizableLoopBody(
     auto load = dyn_cast<AffineLoadOp>(op);
     auto store = dyn_cast<AffineStoreOp>(op);
     int thisOpMemRefDim = -1;
-    bool isContiguous = load ? isContiguousAccess(loop.getInductionVar(), load,
-                                                  &thisOpMemRefDim)
-                             : isContiguousAccess(loop.getInductionVar(), store,
-                                                  &thisOpMemRefDim);
+    bool isContiguous =
+        load ? isContiguousAccess(loop.getInductionVar(),
+                                  (AffineReadOpInterface)load, &thisOpMemRefDim)
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bondhugula wrote:

Sure, done.

https://github.com/llvm/llvm-project/pull/82923