[Mlir-commits] [mlir] [MLIR] Add XeGPU dialect for Intel GPU (PR #78483)
Chao Chen
llvmlistbot at llvm.org
Fri Feb 23 18:12:05 PST 2024
chencha3 wrote:
> Thanks for the patch. I don't have significant concerns with anything right now.
>
> I would wonder if you could split this though and introduce this in a few steps?
>
> I could imagine for example:
>
> 1. The basic dialect structure
> 2. Basic operations
> 3. The TensorDesc type and the operations interacting with it.
> 4. The barrier type and the operations interacting with it.
>
> But you may see other independent blocks?
Thanks for your feedback. We plan to split it into following 5 steps according to your suggestions:
1. A PR simply contains definitions of dialect and base classes for op, type and attribute. We have updated this PR for this purpose.
2. A PR for TensorDesc type and attribute definitions and related operations including `CreateNdDescOp`, `LoadNdOp`, `StoreNdOp`, `PrefetchNdOp`, and `UpdateNdOffsetOp`.
3. A PR for operators working on scattered data elements including `CreateDescOp`, `LoadGatherOp`, `StoreScatterOp`, `PrefetchOp`, `UpdateOffsetOp`.
4. A PR contains Named Barrier definition and related operators, including `nbarrier_alloc`, `create_nbarrier`, `nbarrier_arrive` and `nbarrier_wait`.
5. A PR contains the rest of operators: including `DpasOp`, `MfenceOp`, `AtomicRMWOp` and `CompileHintOp`.
Does this plan sound good to you?
https://github.com/llvm/llvm-project/pull/78483
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