[Mlir-commits] [mlir] [mlir][Vector] Add vector bitwidth target to xfer op flattening (PR #81966)

[Han-Chung Wang]

================
@@ -702,6 +731,11 @@ class FlattenContiguousRowMajorTransferWritePattern
     rewriter.eraseOp(transferWriteOp);
     return success();
   }
+
+private:
+  // Minimum bitwidth that the trailing vector dimension should have after
+  // flattening.
+  unsigned targetVectorBitwidth;
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hanhanW wrote:

`after flattening`? It seems not correct with the implementation. With `targetVectorBitWidth=128` and `vector<1x2x6xi32>` type, it becomes `vector<12xi32>` after flattening; the bit-width of trailing dim is `384`. It sounds like we should flatten it with the configuration.

How about update it to `Maximum bitwidth that ... before flattening`? 

https://github.com/llvm/llvm-project/pull/81966