[Mlir-commits] [mlir] 61f64d1 - Apply clang-tidy fixes for llvm-qualified-auto in SparseTensorRewriting.cpp (NFC)

Mehdi Amini llvmlistbot at llvm.org
Mon Feb 12 13:28:17 PST 2024


Author: Mehdi Amini
Date: 2024-02-12T13:27:49-08:00
New Revision: 61f64d1c237be75bed5d717aec4de0f9df5ab2e7

URL: https://github.com/llvm/llvm-project/commit/61f64d1c237be75bed5d717aec4de0f9df5ab2e7
DIFF: https://github.com/llvm/llvm-project/commit/61f64d1c237be75bed5d717aec4de0f9df5ab2e7.diff

LOG: Apply clang-tidy fixes for llvm-qualified-auto in SparseTensorRewriting.cpp (NFC)

Added: 
    

Modified: 
    mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
index 1883cf1ceed55..235c5453f9cc9 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
@@ -543,14 +543,14 @@ struct GenSemiRingReduction : public OpRewritePattern<GenericOp> {
     if (!op.hasPureTensorSemantics() || op.getNumDpsInputs() != 1 ||
         op.getNumReductionLoops() == 0 || op.getNumResults() != 1)
       return failure();
-    auto inp = op.getDpsInputOperand(0);
-    auto init = op.getDpsInitOperand(0);
+    auto *inp = op.getDpsInputOperand(0);
+    auto *init = op.getDpsInitOperand(0);
     if (!isSparseTensor(inp))
       return failure();
     // Look for direct x = x OP y for semi-ring ready reductions.
-    auto red = cast<linalg::YieldOp>(op.getRegion().front().getTerminator())
-                   .getOperand(0)
-                   .getDefiningOp();
+    auto *red = cast<linalg::YieldOp>(op.getRegion().front().getTerminator())
+                    .getOperand(0)
+                    .getDefiningOp();
     if (!isa<arith::AndIOp, arith::MulIOp, arith::MulFOp, arith::MinimumFOp,
              arith::MinSIOp, arith::MinUIOp, arith::MaximumFOp, arith::MaxSIOp,
              arith::MaxUIOp>(red))
@@ -592,7 +592,7 @@ struct GenSemiRingReduction : public OpRewritePattern<GenericOp> {
     IRMapping irMap;
     irMap.map(red->getOperand(0), region->getArgument(0));
     irMap.map(red->getOperand(1), region->getArgument(1));
-    auto cloned = rewriter.clone(*red, irMap);
+    auto *cloned = rewriter.clone(*red, irMap);
     rewriter.create<sparse_tensor::YieldOp>(loc, cloned->getResult(0));
     rewriter.setInsertionPointAfter(custom);
     rewriter.replaceOp(red, custom.getResult());


        


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