[Mlir-commits] [mlir] [mlir][ArmNeon] Adds Arm Neon SMMLA, UMMLA, and USMMLA Intrinsics (PR #80511)

Kojo Acquah llvmlistbot at llvm.org
Mon Feb 5 14:24:38 PST 2024


================
@@ -31,3 +31,63 @@ func.func @b_has_2_rows_but_a_has_length_4(%a : vector<4xi32>, %b : vector<2x4xi
     %0 = arm_neon.2d.sdot %a, %b, %b : vector<2x4xi8>, vector<2x4xi8> to vector<4xi32>
     return %0 : vector<4xi32>
 }
+
+// -----
+
+func.func @smmla_invalid_input_types(%a: vector<16xi4>,
+                                     %b: vector<16xi4>,
+                                     %c: vector<4xi32>) -> vector<4xi32> {
+  // expected-error at +1 {{op operand #1 must be vector of 8-bit signless integer values of length 16, but got 'vector<16xi4>'}}
----------------
KoolJBlack wrote:

I believe the error is accurate. "operand #1" refers to variable `%a` passed as the second argument to the smmla op below. I guess its confusing at first glance since the test function takes in the accumulator last but passes it as the first argument to the op. 

I've renamed the variables to make this clearer. 

https://github.com/llvm/llvm-project/pull/80511


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