[Mlir-commits] [mlir] [MLIR][XeGPU] Allow some nd ops to have argument shapes mismatch for … (PR #120566)

Adam Siemieniuk llvmlistbot at llvm.org
Mon Dec 23 06:00:18 PST 2024


================
@@ -73,6 +73,29 @@ static bool isWriteHintOrNone(const CachePolicyAttr &attr) {
          kind == CachePolicy::WRITE_BACK || kind == CachePolicy::WRITE_THROUGH;
 }
 
+// Validations for nd instruction arguments is successful if any of these are
+// true:
+// - tensor descriptor and the output vector shapes exactly match.
+// - tensor descriptor has a sg_map attribute and the distributed vector shape
+//   matches the tensor descriptor shape when scaled using sg_map factors on
+//   each dimension.
+static bool isArgShapesValid(ArrayRef<int64_t> descShape,
+                             ArrayRef<int64_t> valShape, SGMapAttr sgMap) {
+  if (descShape == valShape)
+    return true;
+
+  if (!sgMap)
+    return false;
+
+  for (const auto &[factor, dim, expected] :
+       llvm::zip_equal(sgMap.getWiLayout(), valShape, descShape)) {
----------------
adam-smnk wrote:

You should check that `valShape` and `descShape` ranks are equal before the loop. Otherwise, `zip_equal` will assert.

I think the tensor descriptor type should verify that `sg_map` is valid in context of tensor's shape.
Unless we support splitting 1D shapes with 2D map or sth?

https://github.com/llvm/llvm-project/pull/120566


More information about the Mlir-commits mailing list