[Mlir-commits] [mlir] [MLIR] Implement emulation of static indexing subbyte type vector stores (PR #115922)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Sat Dec 7 07:33:29 PST 2024


================
@@ -0,0 +1,104 @@
+// RUN: mlir-opt --test-emulate-narrow-int="arith-compute-bitwidth=1 memref-load-bitwidth=8 atomic-store=false" --cse --split-input-file %s | FileCheck %s
+
+// TODO: remove memref.alloc() in the tests to eliminate noises.
+// memref.alloc exists here because sub-byte vector data types such as i2
+// are currently not supported as input arguments.
+
+func.func @vector_store_i2_const_rmw(%arg0: vector<3xi2>) {
+    %0 = memref.alloc() : memref<3x3xi2>
+    %c0 = arith.constant 0 : index
+    %c2 = arith.constant 2 : index
+    vector.store %arg0, %0[%c2, %c0] :memref<3x3xi2>, vector<3xi2>
+    return
+}
----------------
lialan wrote:

The `const` means it is testing const indices, which can be statically folded.

The difference is the `atomic-store=false` option, when it is set to false, it will emit different rmw sequences. The atomic version uses `memref.generic_atomic_rmw`.

https://github.com/llvm/llvm-project/pull/115922


More information about the Mlir-commits mailing list