[Mlir-commits] [mlir] [MLIR] Implement emulation of static indexing subbyte type vector stores (PR #115922)

Andrzej WarzyƄski llvmlistbot at llvm.org
Wed Dec 4 08:27:43 PST 2024


================
@@ -309,6 +314,90 @@ emulatedVectorLoad(OpBuilder &rewriter, Location loc, Value base,
       newLoad);
 }
 
+/// Emits `memref.generic_atomic_rmw` op to store a subbyte-sized value to a
+/// byte in memory, with a mask. The `valueToStore` is a vector of subbyte-sized
+/// elements, with size of 8 bits, and the mask is used to select which elements
+/// to store.
+///
+/// Before:
+///   memory = |ab|cd|ef|12| : <4xi2> (<1xi8>)
+///   valueToStore = |01|23|45|67| : vector<4xi2>
+///   mask = |0|0|1|1| : vector<4xi1>
+/// After:
+///   memory = |ab|cd|45|67| : <4xi2> (<1xi8>)
----------------
banach-space wrote:

Normally, we use "Before" and "After" for:
* MLIR IR "Before" this transformation,
* MLIR IR "After" this transformation.

Wheres here, it's more like:
* Memory "Before" the store generated here
* Memory "After" the store generated here.

Note also that:
* the actual function argument is `linearizedMemref` rather than `memory`
* `valueToStore = |01|23|45|67| : vector<4xi2>` -> most of the elements in this vector are not `i2`.

I think that this comment needs updating :)

https://github.com/llvm/llvm-project/pull/115922


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