[Mlir-commits] [llvm] [mlir] Add usub_cond and usub_sat operations to atomicrmw (PR #105553)

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git-clang-format --diff f7bbc40b0736cc417f57cd039b098b504cf6a71f cd6dd7b4a5f5d92a6e340073b6037ff6fad9c514 --extensions h,cpp -- llvm/include/llvm/AsmParser/LLToken.h llvm/include/llvm/Bitcode/LLVMBitCodes.h llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h llvm/include/llvm/CodeGen/ISDOpcodes.h llvm/include/llvm/CodeGen/SelectionDAGNodes.h llvm/include/llvm/IR/Instructions.h llvm/lib/AsmParser/LLLexer.cpp llvm/lib/AsmParser/LLParser.cpp llvm/lib/Bitcode/Reader/BitcodeReader.cpp llvm/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/lib/CodeGen/AtomicExpandPass.cpp llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp llvm/lib/IR/AutoUpgrade.cpp llvm/lib/IR/Instructions.cpp llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp llvm/lib/Target/AMDGPU/R600ISelLowering.cpp llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp llvm/lib/Target/PowerPC/PPCISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp llvm/lib/Transforms/Utils/LowerAtomic.cpp
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View the diff from clang-format here.
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diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
index d3b3ffe152..cc3b9dc9df 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -1638,8 +1638,8 @@ public:
 
   /// Build and insert `OldValRes<def> = G_ATOMICRMW_USUB_COND Addr, Val, MMO`.
   ///
-  /// Atomically replace the value at \p Addr with the original value minus \p Val
-  /// if the original value is greater than or equal to \p Val, or leaves it
+  /// Atomically replace the value at \p Addr with the original value minus \p
+  /// Val if the original value is greater than or equal to \p Val, or leaves it
   /// unchanged otherwise. Puts the original value from \p Addr in \p OldValRes.
   ///
   /// \pre setBasicBlock or setMI must have been called.
@@ -1649,14 +1649,14 @@ public:
   ///      same type.
   ///
   /// \return a MachineInstrBuilder for the newly created instruction.
-  MachineInstrBuilder buildAtomicRMWCondSub(
-        const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,
-        MachineMemOperand &MMO);
+  MachineInstrBuilder buildAtomicRMWCondSub(const DstOp &OldValRes,
+                                            const SrcOp &Addr, const SrcOp &Val,
+                                            MachineMemOperand &MMO);
 
   /// Build and insert `OldValRes<def> = G_ATOMICRMW_SUB_CLAMP Addr, Val, MMO`.
   ///
-  /// Atomically replace the value at \p Addr with the original value minus \p Val
-  /// if the original value is greater than or equal to \p Val, or with zero
+  /// Atomically replace the value at \p Addr with the original value minus \p
+  /// Val if the original value is greater than or equal to \p Val, or with zero
   /// otherwise. Puts the original value from \p Addr in \p OldValRes.
   ///
   /// \pre setBasicBlock or setMI must have been called.
@@ -1666,9 +1666,10 @@ public:
   ///      same type.
   ///
   /// \return a MachineInstrBuilder for the newly created instruction.
-  MachineInstrBuilder buildAtomicRMWSubClamp(
-        const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,
-        MachineMemOperand &MMO);
+  MachineInstrBuilder buildAtomicRMWSubClamp(const DstOp &OldValRes,
+                                             const SrcOp &Addr,
+                                             const SrcOp &Val,
+                                             MachineMemOperand &MMO);
 
   /// Build and insert `G_FENCE Ordering, Scope`.
   MachineInstrBuilder buildFence(unsigned Ordering, unsigned Scope);

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https://github.com/llvm/llvm-project/pull/105553