[Mlir-commits] [mlir] [MLIR][DLTI] Introduce DLTIQueryInterface and impl for DLTI attrs (PR #104595)
Rolf Morel
llvmlistbot at llvm.org
Mon Aug 19 13:11:36 PDT 2024
================
@@ -93,20 +85,63 @@ def DLTI_DataLayoutSpecAttr :
/// Returns the stack alignment identifier.
StringAttr getStackAlignmentIdentifier(MLIRContext *context) const;
+
+ /// Returns the attribute associated with the key.
+ FailureOr<Attribute> query(DataLayoutEntryKey key) {
+ return llvm::cast<mlir::DataLayoutSpecInterface>(*this).queryHelper(key);
+ }
+ }];
+}
+
+def DLTI_MapAttr : DLTIAttr<"Map", [DLTIQueryInterface]> {
+ let summary = "A mapping of DLTI-information by way of key-value pairs";
+ let description = [{
+ A Data Layout and Target Information map is a list of entries effectively
+ encoding a dictionary, mapping DLTI-related keys to DLTI-related values.
+
+ This attribute's main purpose is to facilate querying IR for arbitrary
+ DLTI-related key-value associations. Note that facility functions exist to
+ perform recursive lookups on nested DLTI map attributes.
+
+ Consider the following shallow usage of a DLTI-map
+ ```
+ #dlti.map<#dlti.dl_entry<"CPU::cache::L1::size_in_bytes", 65536 : i32>>
+ ```
+ versus nested maps, which make it possible to obtain sub-dictionaries of
+ related information (with the following example making use of other
+ attributes that also implement the `DLTIQueryInterface`):
+ ```
+ #dlti.target_system_spec<"CPU":
+ #dlti.target_device_spec<#dlti.dl_entry<"cache",
+ #dlti.map<#dlti.dl_entry<"L1",
+ #dlti.map<#dlti.dl_entry<"size_in_bytes", 65536 : i32>>,
+ #dlti.dl_entry<"L1d",
+ #dlti.map<#dlti.dl_entry<"size_in_bytes", 32768 : i32>> >>>>
----------------
rolfmorel wrote:
My mistake - thanks for the careful reading!
https://github.com/llvm/llvm-project/pull/104595
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