[Mlir-commits] [mlir] [MLIR][LLVM][Mem2Reg] Extends support for	partial stores (PR #89740)
    Christian Ulmann 
    llvmlistbot at llvm.org
       
    Wed Apr 24 02:33:58 PDT 2024
    
    
  
================
@@ -1047,3 +1025,135 @@ llvm.func @scalable_llvm_vector() -> i16 {
   %2 = llvm.load %1 : !llvm.ptr -> i16
   llvm.return %2 : i16
 }
+
+// -----
+
+// CHECK-LABEL: @smaller_store_forwarding
+// CHECK-SAME: %[[ARG:.+]]: i16
+llvm.func @smaller_store_forwarding(%arg : i16) {
----------------
Dinistro wrote:
Little endian is the default. Currently, MLIR's data layout does not properly convey this information, but LLVM's does. I'll try to allocate time to address this matter.
https://github.com/llvm/llvm-project/pull/89740
    
    
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