[Mlir-commits] [mlir] [MLIR][LLVM][Mem2Reg] Extends support for partial stores (PR #89740)
Tobias Gysi
llvmlistbot at llvm.org
Tue Apr 23 06:03:54 PDT 2024
================
@@ -170,6 +171,35 @@ static bool isBigEndian(const DataLayout &dataLayout) {
/// The size of a byte in bits.
constexpr const static uint64_t kBitsInByte = 8;
+/// Converts a value to an integer type of the same size.
+/// Assumes that the type can be converted.
+static Value convertToIntValue(RewriterBase &rewriter, Location loc, Value val,
+ const DataLayout &dataLayout) {
+ Type type = val.getType();
+ assert(isSupportedTypeForConversion(type));
+
+ if (isa<IntegerType>(type))
+ return val;
+
+ uint64_t typeBitSize = dataLayout.getTypeSizeInBits(type);
+ IntegerType valueSizeInteger = rewriter.getIntegerType(typeBitSize);
+
+ if (isa<LLVM::LLVMPointerType>(type))
+ return rewriter.createOrFold<LLVM::PtrToIntOp>(loc, valueSizeInteger, val);
+ return rewriter.createOrFold<LLVM::BitcastOp>(loc, valueSizeInteger, val);
+}
+
+/// Converts an value with an integer type to `targetType`.
----------------
gysit wrote:
```suggestion
/// Converts a value with an integer type to `targetType`.
```
nit:
https://github.com/llvm/llvm-project/pull/89740
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