[Mlir-commits] [mlir] [MLIR] Add single definition multiple regions for mem2reg (PR #89107)

[Mehdi Amini]

joker-eph wrote:

> The MLIR verifier enforces dominance rule at a sort of syntactic level, but does not take into account actual control-flow (for example in deferred execution of regions). 

This isn’t syntactic, this is actual proper dominance.
I mentioned before that “async” is Theo Bly property that requires some care, but that’s not a dominance problem: an operation with a region does not imply that the region is immediately executed. From a dominance point of view the execution model is that the operands (and all implicitly captured values) are immediately evaluated (and pointers possibly escaped), and the result values are produced when the operation completes (which does not mean the region body was executed: for example the async dialect returns async values).

> By modelling we mean being able to assert (or not) this property on any given pair of operations, for which there currently is no sufficient interface for mem2reg purposes. Is that what you are talking about?

Let’s take all the cases:

- a value is defined by an operation and used as operand by an operation in the same region. The rules of dominance are well defined (this is the base case)
- A value is defined by an operation but used in a region nested beneath another operation in the same region. This is an implicit capture, and it actually has the same semantics as the case above: it can be considered “captured” as an implicit operand by the operation in the same region as where it is defined (point of evaluation), as if the operation was isolated. Without more information you can’t infer anything about the region execution here.
- there are no other cases that would pass the verifier.

> Come to think of it, it may just be sufficient to have an interface that says the regions of an operation are not deferred, which would cover a lot of cases useful to mem2reg.

This is what I pointed before: the talk you referred to is mixing up the async problem for a dominance one.

But in general what can mem2reg do without the RegionBranchOpInterface anyway? And in this case don’t you already know there is no asynchronicity involved?

https://github.com/llvm/llvm-project/pull/89107