[Mlir-commits] [mlir] [MLIR][Mem2Reg][LLVM] Enhance partial load support (PR #89094)
Tobias Gysi
llvmlistbot at llvm.org
Wed Apr 17 10:54:06 PDT 2024
================
@@ -122,37 +123,119 @@ bool LLVM::StoreOp::storesTo(const MemorySlot &slot) {
return getAddr() == slot.ptr;
}
-/// Checks that two types are the same or can be cast into one another.
-static bool areCastCompatible(const DataLayout &layout, Type lhs, Type rhs) {
- return lhs == rhs || (!isa<LLVM::LLVMStructType, LLVM::LLVMArrayType>(lhs) &&
- !isa<LLVM::LLVMStructType, LLVM::LLVMArrayType>(rhs) &&
- layout.getTypeSize(lhs) == layout.getTypeSize(rhs));
+/// Checks if `type` can be used in any kind of conversion sequences.
+static bool isSupportedTypeForConversion(Type type) {
+ // Aggregate types are not bitcastable.
+ if (isa<LLVM::LLVMStructType, LLVM::LLVMArrayType>(type))
+ return false;
+
+ // LLVM vector types are only used for either pointers or target specific
+ // types. These types cannot be casted in the general case, thus the memory
+ // optimizations do not support them.
+ if (isa<LLVM::LLVMFixedVectorType, LLVM::LLVMScalableVectorType>(type))
+ return false;
+
+ // Scalable types are not supported.
+ if (auto vectorType = dyn_cast<VectorType>(type))
+ return !vectorType.isScalable();
+ return true;
}
+/// Checks that `rhs` can be converted to `lhs` by a sequence of casts and
+/// truncations.
+static bool areConversionCompatible(const DataLayout &layout, Type lhs,
+ Type rhs) {
+ if (lhs == rhs)
+ return true;
+
+ if (!isSupportedTypeForConversion(lhs) || !isSupportedTypeForConversion(rhs))
+ return false;
+
+ // Pointer casts will only be sane when the bitsize of both pointer types is
+ // the same.
+ if (isa<LLVM::LLVMPointerType>(lhs) && isa<LLVM::LLVMPointerType>(rhs))
+ return layout.getTypeSize(lhs) == layout.getTypeSize(rhs);
+
+ return layout.getTypeSize(lhs) <= layout.getTypeSize(rhs);
+}
+
+/// Checks if `dataLayout` describes a little endian layout.
+static bool isLittleEndian(const DataLayout &dataLayout) {
----------------
gysit wrote:
I would probably change to isBigEndian and invert the logic since this is corner case. Then the check for !endiannessStr is not needed.
https://github.com/llvm/llvm-project/pull/89094
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