[Mlir-commits] [mlir] [MLIR][LLVM] Fix recursive DI type export memory leak (PR #88122)
Billy Zhu
llvmlistbot at llvm.org
Tue Apr 9 06:23:37 PDT 2024
https://github.com/zyx-billy created https://github.com/llvm/llvm-project/pull/88122
Followup to discussion https://github.com/llvm/llvm-project/pull/87295#discussion_r1556016667.
The export cache should not reuse cache for nodes containing temporaries.
>From 213d3d6dba4d886b712f92f9fa12368cd2df4688 Mon Sep 17 00:00:00 2001
From: Billy Zhu <billyzhu at modular.com>
Date: Tue, 9 Apr 2024 15:20:51 +0200
Subject: [PATCH] cache only if context empty
---
mlir/lib/Target/LLVMIR/DebugTranslation.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/mlir/lib/Target/LLVMIR/DebugTranslation.cpp b/mlir/lib/Target/LLVMIR/DebugTranslation.cpp
index f6e05e25ace6ae..9277848e01f4c4 100644
--- a/mlir/lib/Target/LLVMIR/DebugTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/DebugTranslation.cpp
@@ -349,7 +349,8 @@ llvm::DINode *DebugTranslation::translate(DINodeAttr attr) {
DISubroutineTypeAttr>(
[&](auto attr) { return translateImpl(attr); });
- attrToNode.insert({attr, node});
+ if (recursiveTypeMap.empty())
+ attrToNode.insert({attr, node});
return node;
}
More information about the Mlir-commits
mailing list