[Mlir-commits] [mlir] [MLIR][LLVM][Mem2Reg] Relax type equality requirement for load and store (PR #87637)

Christian Ulmann llvmlistbot at llvm.org
Thu Apr 4 22:30:28 PDT 2024


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@@ -161,8 +193,7 @@ bool LLVM::StoreOp::canUsesBeRemoved(
   // fine, provided we are currently promoting its target value. Don't allow a
   // store OF the slot pointer, only INTO the slot pointer.
   return blockingUse == slot.ptr && getAddr() == slot.ptr &&
-         getValue() != slot.ptr && getValue().getType() == slot.elemType &&
-         !getVolatile_();
+         getValue() != slot.ptr && !getVolatile_();
----------------
Dinistro wrote:

Nice catch. Working with a additional changes in the same files is a bad idea...
At least this shows that we should add a test for this case to ensure that this is detected.

https://github.com/llvm/llvm-project/pull/87637


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