[Mlir-commits] [mlir] [InstCombine] Simplify the pattern `a ne/eq (zext/sext (a ne/eq c))` (PR #65852)
Yingwei Zheng
llvmlistbot at llvm.org
Mon Sep 18 13:14:48 PDT 2023
================
@@ -366,19 +366,10 @@ define void @simplify_before_foldAndOfICmps(ptr %p) {
; CHECK-LABEL: @simplify_before_foldAndOfICmps(
; CHECK-NEXT: [[A8:%.*]] = alloca i16, align 2
; CHECK-NEXT: [[L7:%.*]] = load i16, ptr [[A8]], align 2
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[L7]], -1
-; CHECK-NEXT: [[B11:%.*]] = zext i1 [[TMP1]] to i16
-; CHECK-NEXT: [[C10:%.*]] = icmp ugt i16 [[L7]], [[B11]]
-; CHECK-NEXT: [[C5:%.*]] = icmp slt i16 [[L7]], 1
-; CHECK-NEXT: [[C7:%.*]] = icmp slt i16 [[L7]], 0
-; CHECK-NEXT: [[B15:%.*]] = xor i1 [[C7]], [[C10]]
-; CHECK-NEXT: [[C6:%.*]] = xor i1 [[B15]], true
-; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[C5]], [[C6]]
-; CHECK-NEXT: [[C3:%.*]] = and i1 [[TMP2]], [[C10]]
-; CHECK-NEXT: [[TMP3:%.*]] = xor i1 [[C10]], true
-; CHECK-NEXT: [[C18:%.*]] = or i1 [[C7]], [[TMP3]]
-; CHECK-NEXT: [[TMP4:%.*]] = sext i1 [[C3]] to i64
-; CHECK-NEXT: [[G26:%.*]] = getelementptr i1, ptr null, i64 [[TMP4]]
+; CHECK-NEXT: [[C18:%.*]] = icmp slt i16 [[L7]], 1
+; CHECK-NEXT: [[L7_LOBIT:%.*]] = ashr i16 [[L7]], 15
+; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[L7_LOBIT]] to i64
+; CHECK-NEXT: [[G26:%.*]] = getelementptr i1, ptr null, i64 [[TMP1]]
; CHECK-NEXT: store i16 [[L7]], ptr [[P:%.*]], align 2
----------------
dtcxzyw wrote:
Proof: https://alive2.llvm.org/ce/z/wBGCFz
https://github.com/llvm/llvm-project/pull/65852
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