[Mlir-commits] [mlir] [mlir][vector] add result type to vector.extract assembly format (PR #66499)

[Jakub Kuderski]

kuhar wrote:

Soft +1, I do think this reduces cognitive load for >1-d vectors. And for consistency, extending this to 0 and 1-d vectors makes sense to me.

https://github.com/llvm/llvm-project/pull/66499