[Mlir-commits] [mlir] 4a83125 - [mlir][vector] Rename vector reductions: `maxf` → `maximumf`, `minf` → `minimumf`
Diego Caballero
llvmlistbot at llvm.org
Wed Sep 13 15:50:42 PDT 2023
Author: Daniil Dudkin
Date: 2023-09-13T22:49:07Z
New Revision: 4a831250b871d5fbd5c6923fec4a492ec35f4b12
URL: https://github.com/llvm/llvm-project/commit/4a831250b871d5fbd5c6923fec4a492ec35f4b12
DIFF: https://github.com/llvm/llvm-project/commit/4a831250b871d5fbd5c6923fec4a492ec35f4b12.diff
LOG: [mlir][vector] Rename vector reductions: `maxf` → `maximumf`, `minf` → `minimumf`
This patch is part of a larger initiative aimed at fixing floating-point `max` and `min` operations in MLIR: https://discourse.llvm.org/t/rfc-fix-floating-point-max-and-min-operations-in-mlir/72671.
Here, we are addressing task 2.1 from the plan, which involves renaming the vector reductions to align with the semantics of the corresponding LLVM intrinsics.
Reviewed By: dcaballe
Differential Revision: https://reviews.llvm.org/D158618
Added:
Modified:
mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
mlir/lib/Dialect/Vector/IR/VectorOps.cpp
mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
mlir/test/Dialect/Linalg/vectorization.mlir
mlir/test/Dialect/Vector/canonicalize.mlir
mlir/test/Dialect/Vector/ops.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
index bf42b4053ac05b8..28b5864914f6920 100644
--- a/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
+++ b/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
@@ -48,6 +48,8 @@ def COMBINING_KIND_MAXF : I32BitEnumAttrCaseBit<"MAXF", 7, "maxf">;
def COMBINING_KIND_AND : I32BitEnumAttrCaseBit<"AND", 8, "and">;
def COMBINING_KIND_OR : I32BitEnumAttrCaseBit<"OR", 9, "or">;
def COMBINING_KIND_XOR : I32BitEnumAttrCaseBit<"XOR", 10, "xor">;
+def COMBINING_KIND_MINIMUMF : I32BitEnumAttrCaseBit<"MINIMUMF", 11, "minimumf">;
+def COMBINING_KIND_MAXIMUMF : I32BitEnumAttrCaseBit<"MAXIMUMF", 12, "maximumf">;
def CombiningKind : I32BitEnumAttr<
"CombiningKind",
@@ -55,7 +57,8 @@ def CombiningKind : I32BitEnumAttr<
[COMBINING_KIND_ADD, COMBINING_KIND_MUL, COMBINING_KIND_MINUI,
COMBINING_KIND_MINSI, COMBINING_KIND_MINF, COMBINING_KIND_MAXUI,
COMBINING_KIND_MAXSI, COMBINING_KIND_MAXF, COMBINING_KIND_AND,
- COMBINING_KIND_OR, COMBINING_KIND_XOR]> {
+ COMBINING_KIND_OR, COMBINING_KIND_XOR,
+ COMBINING_KIND_MAXIMUMF, COMBINING_KIND_MINIMUMF]> {
let cppNamespace = "::mlir::vector";
let genSpecializedAttr = 0;
}
diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
index 92f7aa69760395a..5a42cccca297506 100644
--- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
+++ b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
@@ -762,11 +762,11 @@ class VectorReductionOpConversion
result = lowerReductionWithStartValue<LLVM::vector_reduce_fmul,
ReductionNeutralFPOne>(
rewriter, loc, llvmType, operand, acc, reassociateFPReductions);
- } else if (kind == vector::CombiningKind::MINF) {
+ } else if (kind == vector::CombiningKind::MINIMUMF) {
result =
createFPReductionComparisonOpLowering<LLVM::vector_reduce_fminimum>(
rewriter, loc, llvmType, operand, acc);
- } else if (kind == vector::CombiningKind::MAXF) {
+ } else if (kind == vector::CombiningKind::MAXIMUMF) {
result =
createFPReductionComparisonOpLowering<LLVM::vector_reduce_fmaximum>(
rewriter, loc, llvmType, operand, acc);
@@ -893,6 +893,10 @@ class MaskedReductionOpConversion
ReductionNeutralFPMin>(
rewriter, loc, llvmType, operand, acc, maskOp.getMask());
break;
+ default:
+ return rewriter.notifyMatchFailure(
+ maskOp,
+ "lowering to LLVM is not implemented for this masked operation");
}
// Replace `vector.mask` operation altogether.
diff --git a/mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp b/mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
index 57191ce8dd4c946..a8c68abc8bcbf5c 100644
--- a/mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
+++ b/mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
@@ -391,7 +391,8 @@ struct VectorReductionPattern final
INT_AND_FLOAT_CASE(ADD, IAddOp, FAddOp);
INT_AND_FLOAT_CASE(MUL, IMulOp, FMulOp);
-
+ INT_OR_FLOAT_CASE(MAXIMUMF, SPIRVFMaxOp);
+ INT_OR_FLOAT_CASE(MINIMUMF, SPIRVFMinOp);
INT_OR_FLOAT_CASE(MAXF, SPIRVFMaxOp);
INT_OR_FLOAT_CASE(MINF, SPIRVFMinOp);
INT_OR_FLOAT_CASE(MINUI, SPIRVUMinOp);
diff --git a/mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp b/mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
index cf1278a8c6806e7..f873bd0e0b68e43 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
@@ -505,10 +505,10 @@ mlir::linalg::getCombinerOpKind(Operation *combinerOp) {
.Case<arith::AndIOp>([&](auto op) { return CombiningKind::AND; })
.Case<arith::MaxSIOp>([&](auto op) { return CombiningKind::MAXSI; })
.Case<arith::MaxUIOp>([&](auto op) { return CombiningKind::MAXUI; })
- .Case<arith::MaximumFOp>([&](auto op) { return CombiningKind::MAXF; })
+ .Case<arith::MaximumFOp>([&](auto op) { return CombiningKind::MAXIMUMF; })
.Case<arith::MinSIOp>([&](auto op) { return CombiningKind::MINSI; })
.Case<arith::MinUIOp>([&](auto op) { return CombiningKind::MINUI; })
- .Case<arith::MinimumFOp>([&](auto op) { return CombiningKind::MINF; })
+ .Case<arith::MinimumFOp>([&](auto op) { return CombiningKind::MINIMUMF; })
.Case<arith::MulIOp, arith::MulFOp>(
[&](auto op) { return CombiningKind::MUL; })
.Case<arith::OrIOp>([&](auto op) { return CombiningKind::OR; })
@@ -2416,9 +2416,11 @@ bool isSupportedPoolKind(vector::CombiningKind kind) {
switch (kind) {
case vector::CombiningKind::ADD:
case vector::CombiningKind::MAXF:
+ case vector::CombiningKind::MAXIMUMF:
case vector::CombiningKind::MAXSI:
case vector::CombiningKind::MAXUI:
case vector::CombiningKind::MINF:
+ case vector::CombiningKind::MINIMUMF:
case vector::CombiningKind::MINSI:
case vector::CombiningKind::MINUI:
return true;
diff --git a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
index 11aa76798bcaae1..a8ad05f7bc1cabf 100644
--- a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+++ b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
@@ -125,6 +125,8 @@ static bool isSupportedCombiningKind(CombiningKind combiningKind,
return elementType.isIntOrIndex();
case CombiningKind::MINF:
case CombiningKind::MAXF:
+ case CombiningKind::MINIMUMF:
+ case CombiningKind::MAXIMUMF:
return llvm::isa<FloatType>(elementType);
}
return false;
@@ -495,7 +497,7 @@ Value mlir::vector::getVectorReductionOp(arith::AtomicRMWKind op,
CombiningKind::MUL, vector);
case arith::AtomicRMWKind::minimumf:
return builder.create<vector::ReductionOp>(vector.getLoc(),
- CombiningKind::MINF, vector);
+ CombiningKind::MINIMUMF, vector);
case arith::AtomicRMWKind::mins:
return builder.create<vector::ReductionOp>(vector.getLoc(),
CombiningKind::MINSI, vector);
@@ -504,7 +506,7 @@ Value mlir::vector::getVectorReductionOp(arith::AtomicRMWKind op,
CombiningKind::MINUI, vector);
case arith::AtomicRMWKind::maximumf:
return builder.create<vector::ReductionOp>(vector.getLoc(),
- CombiningKind::MAXF, vector);
+ CombiningKind::MAXIMUMF, vector);
case arith::AtomicRMWKind::maxs:
return builder.create<vector::ReductionOp>(vector.getLoc(),
CombiningKind::MAXSI, vector);
@@ -5947,11 +5949,13 @@ Value mlir::vector::makeArithReduction(OpBuilder &b, Location loc,
result = b.createOrFold<arith::AndIOp>(loc, v1, acc);
break;
case CombiningKind::MAXF:
+ case CombiningKind::MAXIMUMF:
assert(llvm::isa<FloatType>(t1) && llvm::isa<FloatType>(tAcc) &&
"expected float values");
result = b.createOrFold<arith::MaximumFOp>(loc, v1, acc);
break;
case CombiningKind::MINF:
+ case CombiningKind::MINIMUMF:
assert(llvm::isa<FloatType>(t1) && llvm::isa<FloatType>(tAcc) &&
"expected float values");
result = b.createOrFold<arith::MinimumFOp>(loc, v1, acc);
diff --git a/mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp b/mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
index b66077372164e79..3ab3c6ad8a3e29e 100644
--- a/mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
@@ -140,7 +140,8 @@ createContractArithOp(Location loc, Value x, Value y, Value acc,
Value mul;
if (isInt) {
- if (kind == CombiningKind::MINF || kind == CombiningKind::MAXF)
+ if (kind == CombiningKind::MINF || kind == CombiningKind::MAXF ||
+ kind == CombiningKind::MINIMUMF || kind == CombiningKind::MAXIMUMF)
// Only valid for floating point types.
return std::nullopt;
mul = rewriter.create<arith::MulIOp>(loc, x, y);
diff --git a/mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp b/mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
index 93c056be972ca76..ef6e6f5264a221a 100644
--- a/mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
@@ -87,9 +87,11 @@ static Value genOperator(Location loc, Value x, Value y,
combinedResult = rewriter.create<arith::XOrIOp>(loc, x, y);
break;
case CombiningKind::MINF:
+ case CombiningKind::MINIMUMF:
combinedResult = rewriter.create<arith::MinimumFOp>(loc, x, y);
break;
case CombiningKind::MAXF:
+ case CombiningKind::MAXIMUMF:
combinedResult = rewriter.create<arith::MaximumFOp>(loc, x, y);
break;
}
@@ -104,7 +106,9 @@ static bool isValidKind(bool isInt, vector::CombiningKind kind) {
KindType type{KindType::INVALID};
switch (kind) {
case CombiningKind::MINF:
+ case CombiningKind::MINIMUMF:
case CombiningKind::MAXF:
+ case CombiningKind::MAXIMUMF:
type = KindType::FLOAT;
break;
case CombiningKind::MINUI:
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
index 44d6b637ede0a96..354c79c9e198a1a 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
@@ -1317,11 +1317,11 @@ func.func @reduce_mul_acc_i32(%arg0: vector<16xi32>, %arg1 : i32) -> i32 {
// -----
-func.func @reduce_fmax_f32(%arg0: vector<16xf32>, %arg1: f32) -> f32 {
- %0 = vector.reduction <maxf>, %arg0, %arg1 : vector<16xf32> into f32
+func.func @reduce_fmaximum_f32(%arg0: vector<16xf32>, %arg1: f32) -> f32 {
+ %0 = vector.reduction <maximumf>, %arg0, %arg1 : vector<16xf32> into f32
return %0 : f32
}
-// CHECK-LABEL: @reduce_fmax_f32(
+// CHECK-LABEL: @reduce_fmaximum_f32(
// CHECK-SAME: %[[A:.*]]: vector<16xf32>, %[[B:.*]]: f32)
// CHECK: %[[V:.*]] = llvm.intr.vector.reduce.fmaximum(%[[A]]) : (vector<16xf32>) -> f32
// CHECK: %[[R:.*]] = llvm.intr.maximum(%[[V]], %[[B]]) : (f32, f32) -> f32
@@ -1329,11 +1329,11 @@ func.func @reduce_fmax_f32(%arg0: vector<16xf32>, %arg1: f32) -> f32 {
// -----
-func.func @reduce_fmin_f32(%arg0: vector<16xf32>, %arg1: f32) -> f32 {
- %0 = vector.reduction <minf>, %arg0, %arg1 : vector<16xf32> into f32
+func.func @reduce_fminimum_f32(%arg0: vector<16xf32>, %arg1: f32) -> f32 {
+ %0 = vector.reduction <minimumf>, %arg0, %arg1 : vector<16xf32> into f32
return %0 : f32
}
-// CHECK-LABEL: @reduce_fmin_f32(
+// CHECK-LABEL: @reduce_fminimum_f32(
// CHECK-SAME: %[[A:.*]]: vector<16xf32>, %[[B:.*]]: f32)
// CHECK: %[[V:.*]] = llvm.intr.vector.reduce.fminimum(%[[A]]) : (vector<16xf32>) -> f32
// CHECK: %[[R:.*]] = llvm.intr.minimum(%[[V]], %[[B]]) : (f32, f32) -> f32
diff --git a/mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir b/mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
index 310df8030db3003..f60a522cbfdba56 100644
--- a/mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
+++ b/mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
@@ -50,7 +50,7 @@ func.func @cl_fma_size1_vector(%a: vector<1xf32>, %b: vector<1xf32>, %c: vector<
return %0 : vector<1xf32>
}
-// CHECK-LABEL: func @cl_reduction_maxf
+// CHECK-LABEL: func @cl_reduction_maximumf
// CHECK-SAME: (%[[V:.+]]: vector<3xf32>, %[[S:.+]]: f32)
// CHECK: %[[S0:.+]] = spirv.CompositeExtract %[[V]][0 : i32] : vector<3xf32>
// CHECK: %[[S1:.+]] = spirv.CompositeExtract %[[V]][1 : i32] : vector<3xf32>
@@ -59,12 +59,12 @@ func.func @cl_fma_size1_vector(%a: vector<1xf32>, %b: vector<1xf32>, %c: vector<
// CHECK: %[[MAX1:.+]] = spirv.CL.fmax %[[MAX0]], %[[S2]]
// CHECK: %[[MAX2:.+]] = spirv.CL.fmax %[[MAX1]], %[[S]]
// CHECK: return %[[MAX2]]
-func.func @cl_reduction_maxf(%v : vector<3xf32>, %s: f32) -> f32 {
- %reduce = vector.reduction <maxf>, %v, %s : vector<3xf32> into f32
+func.func @cl_reduction_maximumf(%v : vector<3xf32>, %s: f32) -> f32 {
+ %reduce = vector.reduction <maximumf>, %v, %s : vector<3xf32> into f32
return %reduce : f32
}
-// CHECK-LABEL: func @cl_reduction_minf
+// CHECK-LABEL: func @cl_reduction_minimumf
// CHECK-SAME: (%[[V:.+]]: vector<3xf32>, %[[S:.+]]: f32)
// CHECK: %[[S0:.+]] = spirv.CompositeExtract %[[V]][0 : i32] : vector<3xf32>
// CHECK: %[[S1:.+]] = spirv.CompositeExtract %[[V]][1 : i32] : vector<3xf32>
@@ -73,8 +73,8 @@ func.func @cl_reduction_maxf(%v : vector<3xf32>, %s: f32) -> f32 {
// CHECK: %[[MIN1:.+]] = spirv.CL.fmin %[[MIN0]], %[[S2]]
// CHECK: %[[MIN2:.+]] = spirv.CL.fmin %[[MIN1]], %[[S]]
// CHECK: return %[[MIN2]]
-func.func @cl_reduction_minf(%v : vector<3xf32>, %s: f32) -> f32 {
- %reduce = vector.reduction <minf>, %v, %s : vector<3xf32> into f32
+func.func @cl_reduction_minimumf(%v : vector<3xf32>, %s: f32) -> f32 {
+ %reduce = vector.reduction <minimumf>, %v, %s : vector<3xf32> into f32
return %reduce : f32
}
@@ -516,7 +516,7 @@ func.func @reduction_mul(%v : vector<3xf32>, %s: f32) -> f32 {
// -----
-// CHECK-LABEL: func @reduction_maxf
+// CHECK-LABEL: func @reduction_maximumf
// CHECK-SAME: (%[[V:.+]]: vector<3xf32>, %[[S:.+]]: f32)
// CHECK: %[[S0:.+]] = spirv.CompositeExtract %[[V]][0 : i32] : vector<3xf32>
// CHECK: %[[S1:.+]] = spirv.CompositeExtract %[[V]][1 : i32] : vector<3xf32>
@@ -525,14 +525,14 @@ func.func @reduction_mul(%v : vector<3xf32>, %s: f32) -> f32 {
// CHECK: %[[MAX1:.+]] = spirv.GL.FMax %[[MAX0]], %[[S2]]
// CHECK: %[[MAX2:.+]] = spirv.GL.FMax %[[MAX1]], %[[S]]
// CHECK: return %[[MAX2]]
-func.func @reduction_maxf(%v : vector<3xf32>, %s: f32) -> f32 {
- %reduce = vector.reduction <maxf>, %v, %s : vector<3xf32> into f32
+func.func @reduction_maximumf(%v : vector<3xf32>, %s: f32) -> f32 {
+ %reduce = vector.reduction <maximumf>, %v, %s : vector<3xf32> into f32
return %reduce : f32
}
// -----
-// CHECK-LABEL: func @reduction_minf
+// CHECK-LABEL: func @reduction_minimumf
// CHECK-SAME: (%[[V:.+]]: vector<3xf32>, %[[S:.+]]: f32)
// CHECK: %[[S0:.+]] = spirv.CompositeExtract %[[V]][0 : i32] : vector<3xf32>
// CHECK: %[[S1:.+]] = spirv.CompositeExtract %[[V]][1 : i32] : vector<3xf32>
@@ -541,8 +541,8 @@ func.func @reduction_maxf(%v : vector<3xf32>, %s: f32) -> f32 {
// CHECK: %[[MIN1:.+]] = spirv.GL.FMin %[[MIN0]], %[[S2]]
// CHECK: %[[MIN2:.+]] = spirv.GL.FMin %[[MIN1]], %[[S]]
// CHECK: return %[[MIN2]]
-func.func @reduction_minf(%v : vector<3xf32>, %s: f32) -> f32 {
- %reduce = vector.reduction <minf>, %v, %s : vector<3xf32> into f32
+func.func @reduction_minimumf(%v : vector<3xf32>, %s: f32) -> f32 {
+ %reduce = vector.reduction <minimumf>, %v, %s : vector<3xf32> into f32
return %reduce : f32
}
diff --git a/mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir b/mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
index e6ce0446924d501..29c42fcd50bd746 100644
--- a/mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
+++ b/mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
@@ -50,7 +50,7 @@ func.func @vecdim_reduction_minf(%in: memref<256x512xf32>, %out: memref<256xf32>
// CHECK: %[[min:.*]] = arith.minimumf %[[red_iter]], %[[ld]] : vector<128xf32>
// CHECK: affine.yield %[[min]] : vector<128xf32>
// CHECK: }
-// CHECK: %[[final_min:.*]] = vector.reduction <minf>, %[[vred:.*]] : vector<128xf32> into f32
+// CHECK: %[[final_min:.*]] = vector.reduction <minimumf>, %[[vred:.*]] : vector<128xf32> into f32
// CHECK: affine.store %[[final_min]], %{{.*}} : memref<256xf32>
// CHECK: }
@@ -77,7 +77,7 @@ func.func @vecdim_reduction_maxf(%in: memref<256x512xf32>, %out: memref<256xf32>
// CHECK: %[[max:.*]] = arith.maximumf %[[red_iter]], %[[ld]] : vector<128xf32>
// CHECK: affine.yield %[[max]] : vector<128xf32>
// CHECK: }
-// CHECK: %[[final_max:.*]] = vector.reduction <maxf>, %[[vred:.*]] : vector<128xf32> into f32
+// CHECK: %[[final_max:.*]] = vector.reduction <maximumf>, %[[vred:.*]] : vector<128xf32> into f32
// CHECK: affine.store %[[final_max]], %{{.*}} : memref<256xf32>
// CHECK: }
diff --git a/mlir/test/Dialect/Linalg/vectorization.mlir b/mlir/test/Dialect/Linalg/vectorization.mlir
index da9ef1f70de4b79..a5ec058b6e02c9c 100644
--- a/mlir/test/Dialect/Linalg/vectorization.mlir
+++ b/mlir/test/Dialect/Linalg/vectorization.mlir
@@ -1172,7 +1172,7 @@ transform.sequence failures(propagate) {
func.func @red_max_2d(%arg0: tensor<4x4xf32>) -> tensor<4xf32> {
// CHECK: %[[CMINF:.+]] = arith.constant dense<-3.402820e+38> : vector<4xf32>
// CHECK: tensor.empty() : tensor<4xf32>
- // CHECK: vector.multi_reduction <maxf>, {{.*}}, %[[CMINF]] [1] : vector<4x4xf32> to vector<4xf32>
+ // CHECK: vector.multi_reduction <maximumf>, {{.*}}, %[[CMINF]] [1] : vector<4x4xf32> to vector<4xf32>
// CHECK: vector.transfer_write {{.*}} : vector<4xf32>, tensor<4xf32>
%ident = arith.constant -3.40282e+38 : f32
%init = tensor.empty() : tensor<4xf32>
@@ -1203,7 +1203,7 @@ func.func @red_min_2d(%arg0: tensor<4x4xf32>) -> tensor<4xf32> {
// CHECK: %[[CMAXF:.+]] = arith.constant dense<3.402820e+38> : vector<4xf32>
// CHECK: tensor.empty() : tensor<4xf32>
// CHECK: vector.transfer_read {{.*}} : tensor<4x4xf32>, vector<4x4xf32>
- // CHECK: vector.multi_reduction <minf>, {{.*}}, %[[CMAXF]] [1] : vector<4x4xf32> to vector<4xf32>
+ // CHECK: vector.multi_reduction <minimumf>, {{.*}}, %[[CMAXF]] [1] : vector<4x4xf32> to vector<4xf32>
// CHECK: vector.transfer_write {{.*}} : vector<4xf32>, tensor<4xf32>
%maxf32 = arith.constant 3.40282e+38 : f32
%init = tensor.empty() : tensor<4xf32>
diff --git a/mlir/test/Dialect/Vector/canonicalize.mlir b/mlir/test/Dialect/Vector/canonicalize.mlir
index c22e68b986961d0..98b8ce41e15f610 100644
--- a/mlir/test/Dialect/Vector/canonicalize.mlir
+++ b/mlir/test/Dialect/Vector/canonicalize.mlir
@@ -1992,13 +1992,13 @@ func.func @dont_reduce_one_element_vector(%a : vector<4xf32>) -> f32 {
// -----
-// CHECK-LABEL: func @reduce_one_element_vector_maxf
+// CHECK-LABEL: func @reduce_one_element_vector_maximumf
// CHECK-SAME: (%[[V:.+]]: vector<1xf32>, %[[B:.+]]: f32)
// CHECK: %[[A:.+]] = vector.extract %[[V]][0] : vector<1xf32>
// CHECK: %[[S:.+]] = arith.maximumf %[[A]], %[[B]] : f32
// CHECK: return %[[S]]
-func.func @reduce_one_element_vector_maxf(%a : vector<1xf32>, %b: f32) -> f32 {
- %s = vector.reduction <maxf>, %a, %b : vector<1xf32> into f32
+func.func @reduce_one_element_vector_maximumf(%a : vector<1xf32>, %b: f32) -> f32 {
+ %s = vector.reduction <maximumf>, %a, %b : vector<1xf32> into f32
return %s : f32
}
diff --git a/mlir/test/Dialect/Vector/ops.mlir b/mlir/test/Dialect/Vector/ops.mlir
index d41cee5ea67b0c5..4ea4379372e8380 100644
--- a/mlir/test/Dialect/Vector/ops.mlir
+++ b/mlir/test/Dialect/Vector/ops.mlir
@@ -576,9 +576,13 @@ func.func @reduce_fp(%arg0: vector<16xf32>, %arg1: f32) -> f32 {
vector.reduction <mul>, %arg0, %arg1 : vector<16xf32> into f32
// CHECK: vector.reduction <minf>, %{{.*}} : vector<16xf32> into f32
vector.reduction <minf>, %arg0 : vector<16xf32> into f32
- // CHECK: %[[X:.*]] = vector.reduction <maxf>, %{{.*}} : vector<16xf32> into f32
+ // CHECK: %[[X0:.*]] = vector.reduction <maxf>, %{{.*}} : vector<16xf32> into f32
%0 = vector.reduction <maxf>, %arg0 : vector<16xf32> into f32
- // CHECK: return %[[X]] : f32
+ // CHECK: vector.reduction <minimumf>, %{{.*}} : vector<16xf32> into f32
+ vector.reduction <minimumf>, %arg0 : vector<16xf32> into f32
+ // CHECK: %[[X1:.*]] = vector.reduction <maximumf>, %{{.*}} : vector<16xf32> into f32
+ %1 = vector.reduction <maximumf>, %arg0 : vector<16xf32> into f32
+ // CHECK: return %[[X0]] : f32
return %0 : f32
}
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir b/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
index d71a6a3de649230..1ebf0394d4b9f8f 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32-reassoc.mlir
@@ -27,10 +27,10 @@ func.func @entry() {
%1 = vector.reduction <mul>, %v2 : vector<64xf32> into f32
vector.print %1 : f32
// CHECK: 6
- %2 = vector.reduction <minf>, %v2 : vector<64xf32> into f32
+ %2 = vector.reduction <minimumf>, %v2 : vector<64xf32> into f32
vector.print %2 : f32
// CHECK: 1
- %3 = vector.reduction <maxf>, %v2 : vector<64xf32> into f32
+ %3 = vector.reduction <maximumf>, %v2 : vector<64xf32> into f32
vector.print %3 : f32
// CHECK: 3
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
index 91b0c4778226674..fdb83ba055ac975 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f32.mlir
@@ -39,10 +39,10 @@ func.func @entry() {
%1 = vector.reduction <mul>, %v9 : vector<10xf32> into f32
vector.print %1 : f32
// CHECK: -5760
- %2 = vector.reduction <minf>, %v9 : vector<10xf32> into f32
+ %2 = vector.reduction <minimumf>, %v9 : vector<10xf32> into f32
vector.print %2 : f32
// CHECK: -16
- %3 = vector.reduction <maxf>, %v9 : vector<10xf32> into f32
+ %3 = vector.reduction <maximumf>, %v9 : vector<10xf32> into f32
vector.print %3 : f32
// CHECK: 5
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir b/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
index 49a92ff41d7fa26..8c250de5786fbec 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64-reassoc.mlir
@@ -27,10 +27,10 @@ func.func @entry() {
%1 = vector.reduction <mul>, %v2 : vector<64xf64> into f64
vector.print %1 : f64
// CHECK: 6
- %2 = vector.reduction <minf>, %v2 : vector<64xf64> into f64
+ %2 = vector.reduction <minimumf>, %v2 : vector<64xf64> into f64
vector.print %2 : f64
// CHECK: 1
- %3 = vector.reduction <maxf>, %v2 : vector<64xf64> into f64
+ %3 = vector.reduction <maximumf>, %v2 : vector<64xf64> into f64
vector.print %3 : f64
// CHECK: 3
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir b/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir
index 1b063b7a6b460f7..5d3c2a5f02db7d1 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/test-reductions-f64.mlir
@@ -39,10 +39,10 @@ func.func @entry() {
%1 = vector.reduction <mul>, %v9 : vector<10xf64> into f64
vector.print %1 : f64
// CHECK: -5760
- %2 = vector.reduction <minf>, %v9 : vector<10xf64> into f64
+ %2 = vector.reduction <minimumf>, %v9 : vector<10xf64> into f64
vector.print %2 : f64
// CHECK: -16
- %3 = vector.reduction <maxf>, %v9 : vector<10xf64> into f64
+ %3 = vector.reduction <maximumf>, %v9 : vector<10xf64> into f64
vector.print %3 : f64
// CHECK: 5
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