[Mlir-commits] [mlir] baf2d13 - [mlir][GPUToROCDL] Lower arith.remf to GPU intrinsic.
Adrian Kuegel
llvmlistbot at llvm.org
Mon Sep 4 05:05:34 PDT 2023
Author: Adrian Kuegel
Date: 2023-09-04T14:05:04+02:00
New Revision: baf2d13519f9ca627c0525bd5d84ec5148f47662
URL: https://github.com/llvm/llvm-project/commit/baf2d13519f9ca627c0525bd5d84ec5148f47662
DIFF: https://github.com/llvm/llvm-project/commit/baf2d13519f9ca627c0525bd5d84ec5148f47662.diff
LOG: [mlir][GPUToROCDL] Lower arith.remf to GPU intrinsic.
Differential Revision: https://reviews.llvm.org/D159423
Added:
Modified:
mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Removed:
################################################################################
diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
index 7a90f228f3cf73f..e2cb3687d87288f 100644
--- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
@@ -317,8 +317,9 @@ void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) {
target.addLegalDialect<ROCDL::ROCDLDialect>();
target.addIllegalDialect<gpu::GPUDialect>();
target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::Exp2Op, LLVM::FAbsOp,
- LLVM::FCeilOp, LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op,
- LLVM::Log2Op, LLVM::PowOp, LLVM::SinOp, LLVM::SqrtOp>();
+ LLVM::FCeilOp, LLVM::FFloorOp, LLVM::FRemOp, LLVM::LogOp,
+ LLVM::Log10Op, LLVM::Log2Op, LLVM::PowOp, LLVM::SinOp,
+ LLVM::SqrtOp>();
// TODO: Remove once we support replacing non-root ops.
target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>();
@@ -386,6 +387,8 @@ void mlir::populateGpuToROCDLConversionPatterns(
"__ocml_expm1_f64");
populateOpPatterns<math::FloorOp>(converter, patterns, "__ocml_floor_f32",
"__ocml_floor_f64");
+ populateOpPatterns<arith::RemFOp>(converter, patterns, "__ocml_fmod_f32",
+ "__ocml_fmod_f64");
populateOpPatterns<math::LogOp>(converter, patterns, "__ocml_log_f32",
"__ocml_log_f64");
populateOpPatterns<math::Log10Op>(converter, patterns, "__ocml_log10_f32",
diff --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
index 8f27c4b0bcc74b4..b1ae2f2a2540547 100644
--- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
+++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
@@ -574,6 +574,21 @@ gpu.module @test_module {
// -----
+gpu.module @test_module {
+ // CHECK: llvm.func @__ocml_fmod_f32(f32, f32) -> f32
+ // CHECK: llvm.func @__ocml_fmod_f64(f64, f64) -> f64
+ // CHECK-LABEL: func @gpu_fmod
+ func.func @gpu_fmod(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
+ %result32 = arith.remf %arg_f32, %arg_f32 : f32
+ // CHECK: llvm.call @__ocml_fmod_f32(%{{.*}}, %{{.*}}) : (f32, f32) -> f32
+ %result64 = arith.remf %arg_f64, %arg_f64 : f64
+ // CHECK: llvm.call @__ocml_fmod_f64(%{{.*}}, %{{.*}}) : (f64, f64) -> f64
+ func.return %result32, %result64 : f32, f64
+ }
+}
+
+// -----
+
gpu.module @test_module {
// CHECK-LABEL: func @gpu_shuffle()
func.func @gpu_shuffle() -> (f32, f32) {
@@ -612,4 +627,4 @@ gpu.module @test_module {
%shfli, %predi = gpu.shuffle idx %arg0, %arg1, %arg2 : f32
func.return %shfl, %shfli : f32, f32
}
-}
\ No newline at end of file
+}
More information about the Mlir-commits
mailing list