[Mlir-commits] [mlir] [mlir][spirv] Add support for VectorAnyINTEL capability (PR #68034)

Lei Zhang llvmlistbot at llvm.org
Sat Oct 28 22:33:02 PDT 2023


================
@@ -171,9 +173,17 @@ void CompositeType::getCapabilities(
       .Case<VectorType>([&](VectorType type) {
         auto vecSize = getNumElements();
         if (vecSize == 8 || vecSize == 16) {
-          static const Capability caps[] = {Capability::Vector16};
-          ArrayRef<Capability> ref(caps, std::size(caps));
-          capabilities.push_back(ref);
+          static constexpr Capability caps[] = {Capability::Vector16,
+                                                Capability::VectorAnyINTEL};
+          capabilities.push_back(caps);
+        }
+        // VectorAnyINTEL capability removes the vector size restriction and
----------------
antiagainst wrote:

Not sure I follow the logic here. We are pushing duplicated capabilities here? Shouldn't we do the check `vecSize > 4` to include `VectorAnyINTEL` first, and then additionally add `Vector16` if `vecSize == 8 || vecSize == 16`?

https://github.com/llvm/llvm-project/pull/68034


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