[Mlir-commits] [mlir] [MLIR][NVGPU] Remove Memref Rank vs. Coordinates `tma.async.load` (PR #69584)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Tue Oct 24 08:46:46 PDT 2023


qcolombet wrote:

Instead of relaxing the check, I feel that we would need to use a `collapse_shape` on the input `memref`.

In particular, what would be the semantic of:
```
nvgpu.tma.async.load %0[%c1, %c2], %1 to %2 : ... -> memref<Outerx64x128xf16, ..., 3>
```
Is `c1` applied to `Outer` or to `64` dim?

I think the motivating example only works because the leading dim of the input memref is 1.

https://github.com/llvm/llvm-project/pull/69584


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