[Mlir-commits] [mlir] [mlir][spirv] Add support for VectorAnyINTEL capability (PR #68034)
Jakub Kuderski
llvmlistbot at llvm.org
Sun Oct 22 11:44:36 PDT 2023
================
@@ -184,9 +184,12 @@ static Type parseAndVerifyType(SPIRVDialect const &dialect,
parser.emitError(typeLoc, "only 1-D vector allowed but found ") << t;
return Type();
}
- if (t.getNumElements() > 4) {
+ // Number of elements should be between [2 - 2^32 -1],
+ // since getNumElements() returns an unsigned, the upper limit check is
+ // unnecessary.
+ if (t.getNumElements() < 2) {
parser.emitError(
- typeLoc, "vector length has to be less than or equal to 4 but found ")
+ typeLoc, "vector length has to be between [2 - 2^32 -1] but found ")
----------------
kuhar wrote:
nit: I find this format a bit difficult to parse with two `-` signs. What do you think about something like this:
```suggestion
typeLoc, "vector length must be in the range [2, 2^32), but found ")
```
https://github.com/llvm/llvm-project/pull/68034
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