[Mlir-commits] [mlir] [MLIR][NVGPU] Remove Memref Rank vs. Coordinates `tma.async.load` (PR #69584)
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Thu Oct 19 03:19:21 PDT 2023
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir-gpu
Author: Guray Ozen (grypp)
<details>
<summary>Changes</summary>
Previously, a verifier to check for mismatches between memref rank and number of coordinates was introduced. I noticed that it is very strict. Let's take following IR snippet where the verifier complains about mismatches (2 coordinates (%c1,%c2) != memref rank 3).
```
nvgpu.tma.async.load %0[%c1, %c2], %1 to %2 : ... -> memref<1x64x128xf16, ..., 3>
```
This PR relax the verifier.
---
Full diff: https://github.com/llvm/llvm-project/pull/69584.diff
1 Files Affected:
- (modified) mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp (-6)
``````````diff
diff --git a/mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp b/mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
index f5b02fe1b515591..2a280df68371d17 100644
--- a/mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
+++ b/mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
@@ -347,12 +347,6 @@ LogicalResult TmaAsyncLoadOp::verify() {
if (getCoordinates().size() > 5) {
return emitError() << "Maximum 5 coordinates are supported.";
}
- if (getCoordinates().size() != size_t(dstMemref.getRank())) {
- return emitError() << "Destination memref rank is "
- << size_t(dstMemref.getRank()) << " but there are "
- << getCoordinates().size()
- << " coordinates. They must match.";
- }
return success();
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/69584
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