[Mlir-commits] [mlir] [mlir][spirv][webgpu] Add lowering of IAddCarry to IAdd (PR #68495)

Jakub Kuderski llvmlistbot at llvm.org
Sat Oct 14 15:47:07 PDT 2023


kuhar wrote:

@inbelic Signed and unsigned integer addition is the same operation, that's why there's a single `addi` instead of  `addui`/`addsi`. When we embed constants in the IR and print it back the interpretation is signed and we see negative numbers, but it doesn't matter -- it's the same bitpattern as for the unsigned result.

Therefore, `addui_extended`/`IAddCarry` both implement signless addition, and the carry bit corresponds to the unsigned overflow bit.

https://github.com/llvm/llvm-project/pull/68495


More information about the Mlir-commits mailing list