[Mlir-commits] [mlir] [mlir][bufferization] Improve verifier for `bufferization.dealloc` (PR #67912)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Sun Oct 1 05:10:28 PDT 2023
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir
<details>
<summary>Changes</summary>
Check that the number of retained operands and updated conditions match.
---
Full diff: https://github.com/llvm/llvm-project/pull/67912.diff
2 Files Affected:
- (modified) mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp (+3)
- (modified) mlir/test/Dialect/Bufferization/invalid.mlir (+8)
``````````diff
diff --git a/mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp b/mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
index 7c6c1be351cced1..d2823d17c99c88c 100644
--- a/mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
+++ b/mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
@@ -764,6 +764,9 @@ LogicalResult DeallocOp::verify() {
if (getMemrefs().size() != getConditions().size())
return emitOpError(
"must have the same number of conditions as memrefs to deallocate");
+ if (getRetained().size() != getUpdatedConditions().size())
+ return emitOpError("must have the same number of updated conditions "
+ "(results) as retained operands");
return success();
}
diff --git a/mlir/test/Dialect/Bufferization/invalid.mlir b/mlir/test/Dialect/Bufferization/invalid.mlir
index 3dfd1eb17e8d64f..8004ec632453e8c 100644
--- a/mlir/test/Dialect/Bufferization/invalid.mlir
+++ b/mlir/test/Dialect/Bufferization/invalid.mlir
@@ -87,3 +87,11 @@ func.func @invalid_dealloc_wrong_number_of_results(%arg0: memref<2xf32>, %arg1:
%0:2 = bufferization.dealloc (%arg0, %arg1 : memref<2xf32>, memref<4xi32>) if (%arg2, %arg2) retain (%arg1 : memref<4xi32>)
return %0#0 : i1
}
+
+// -----
+
+func.func @invalid_dealloc_wrong_number_of_results(%arg0: memref<2xf32>, %arg1: memref<4xi32>, %arg2: i1) -> i1 {
+ // expected-error @below{{must have the same number of updated conditions (results) as retained operands}}
+ %0:3 = "bufferization.dealloc"(%arg0, %arg1, %arg2, %arg2, %arg1) <{operandSegmentSizes = array<i32: 2, 2, 1>}> : (memref<2xf32>, memref<4xi32>, i1, i1, memref<4xi32>) -> (i1, i1, i1)
+ return %0#0 : i1
+}
``````````
</details>
https://github.com/llvm/llvm-project/pull/67912
More information about the Mlir-commits
mailing list