[Mlir-commits] [mlir] [mlir][Vector] Add narrow type emulation pattern for vector.maskedload (PR #68443)
Han-Chung Wang
llvmlistbot at llvm.org
Wed Nov 29 15:47:54 PST 2023
================
@@ -164,6 +164,13 @@ func.func @fext(%a: vector<5xi8>) {
return
}
+func.func @fcst_maskedload(%A: memref<?xi4>, %passthru: vector<6xi4>) -> vector<6xi4> {
+ %c0 = arith.constant 0: index
+ %mask = vector.constant_mask [3] : vector<6xi1>
+ %1 = vector.maskedload %A[%c0], %mask, %passthru :
+ memref<?xi4>, vector<6xi1>, vector<6xi4> into vector<6xi4>
+ return %1 : vector<6xi4>
+}
----------------
hanhanW wrote:
I just noticed that this is not tested because the patterns are not populated..
https://github.com/llvm/llvm-project/blob/a0bd6361d4840f159e48c7359807ae279d006fb0/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp#L162-L165
To test it, we need to set up a type converter and populate those patterns.
https://github.com/llvm/llvm-project/pull/68443
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